HYB18L128160BC-7.5 QIMONDA [Qimonda AG], HYB18L128160BC-7.5 Datasheet - Page 8

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HYB18L128160BC-7.5

Manufacturer Part Number
HYB18L128160BC-7.5
Description
DRAMs for Mobile Applications 128-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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The 128-Mbit Mobile-RAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits.
It is internally configured as a quad-bank DRAM.
READ and WRITE accesses to the Mobile-RAM are burst oriented; accesses start at a selected location and
continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration
of an ACTIVE command, followed by a READ or WRITE command. The address bits registered coincident with
the ACTIVE command are used to select the bank and row to be accessed (BA0, BA1 select the banks, A0 - A11
select the row). The address bits registered coincident with the READ or WRITE command are used to select the
starting column location for the burst access.
Prior to normal operation, the Mobile-RAM must be initialized. The following sections provide detailed information
covering device initialization, register definition, command description and device operation.
2.1
The Mobile-RAM must be powered up and initialized in a predefined manner (see
procedures other than those specified may result in undefined operation.
Figure 3
Data Sheet
Functional Description
Power On and Initialization
Power-Up Sequence and Mode Register Sets
8
Functional DescriptionPower On and Initialization
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
05282004-NZNK-8T0D
Figure
Rev. 1.71, 2007-01
3). Operational

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