HYB18L128160BC-7.5 QIMONDA [Qimonda AG], HYB18L128160BC-7.5 Datasheet - Page 28

• Manufacturer Part Number: HYB18L128160BC-7.5
• Description: DRAMs for Mobile Applications 128-Mbit Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

Table 12
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
Figure 25
Data Sheet
Parameter
DQ and DQM input setup time
DQ input hold time
DQM input hold time
DQM write mask latency
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE to PRECHARGE command period
WRITE recovery time
PRECHARGE command period
no. of clock cycles = specified delay / clock period; round up to next integer.
Timing Parameters for WRITE
WRITE Burst (CAS Latency = 2)
Symbol
t
t
t
t
t
t
t
t
IS
IH
DQW
RC
RCD
RAS
WR
RP
28
1.5
0.8
0.5
0
67
19
45
14
19
min.
- 7.5
Functional DescriptionCommands
HY[B/E]18L128160B[C/F]-7.5
—
—
—
—
—
—
100k
—
—
max.
128-Mbit Mobile-RAM
05282004-NZNK-8T0D
Rev. 1.71, 2007-01
ns
ns
ns
t
ns
ns
ns
ns
ns
CK
Units
—
—
—
—
1)
Notes