ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 14

• Manufacturer Part Number: ST7FL15F1MAE
• Description: 8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7L15, ST7L19
DATA EEPROM (cont’d)
5.3 MEMORY ACCESS
The Data EEPROM memory read/write access
modes are controlled by the E2LAT bit of the EEP-
ROM Control/Status register (EECSR). The flow-
chart in
access modes.
Read Operation (E2LAT = 0)
The EEPROM can be read as a normal ROM loca-
tion when the E2LAT bit of the EECSR register is
cleared.
On this device, Data EEPROM can also be used to
execute machine code. Do not write to the Data
EEPROM while executing from it. This would re-
sult in an unexpected code being executed.
Write Operation (E2LAT = 1)
To access the write mode, the E2LAT bit must be
set by software (the E2PGM bit remains cleared).
When a write access to the EEPROM area occurs,
Figure 6. Data EEPROM Programming Flowchart
14/138
1
Figure 6
describes these different memory
IN EEPROM AREA
READ MODE
E2PGM = 0
READ BYTES
E2LAT = 0
CLEARED BY HARDWARE
(with the same 11 MSB of the address)
the value is latched inside the 32 data latches ac-
cording to its address.
When PGM bit is set by the software, all the previ-
ous bytes written in the data latches (up to 32) are
programmed in the EEPROM cells. The effective
high address (row) is determined by the last EEP-
ROM write sequence. To avoid wrong program-
ming, the user must ensure that all the bytes writ-
ten between two programming sequences have
the same high address: Only the five Least Signif-
icant Bits of the address can change.
At the end of the programming cycle, the PGM and
LAT bits are cleared simultaneously.
Note: Care should be taken during the program-
ming cycle. Writing to the same memory location
over-programs the memory (logical AND between
the two write access data results) because the
data latches are only cleared at the end of the pro-
gramming cycle and by the falling edge of the
E2LAT bit.
It is not possible to read the latched data.
This note is illustrated by the
START PROGRAMMING CYCLE
E2PGM = 1 (set by software)
WRITE UP TO 32 BYTES
0
IN EEPROM AREA
WRITE MODE
E2PGM = 0
E2LAT = 1
E2LAT = 1
E2LAT
1
Figure 8 on page
16.