ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 50

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ST7FL15F1MAE

Manufacturer Part Number
ST7FL15F1MAE
Description
8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
ST7L15, ST7L19
11 ON-CHIP PERIPHERALS
11.1 WATCHDOG TIMER (WDG)
11.1.1 Introduction
The Watchdog timer is used to detect the occur-
rence of a software fault, usually generated by ex-
ternal interference or by unforeseen logical condi-
tions, which causes the application program to
abandon its normal sequence. The Watchdog cir-
cuit generates an MCU reset upon expiration of a
programmed time period, unless the program re-
freshes the counter’s contents before the T6 bit is
cleared.
11.1.2 Main Features
Figure 31. Watchdog Block Diagram
50/138
1
Programmable free-running downcounter (64
increments of 16000 CPU cycles)
Programmable reset
f
CPU
WDGA
RESET
T6
T5
WATCHDOG CONTROL REGISTER (CR)
7-bit DOWNCOUNTER
CLOCK DIVIDER
T4
11.1.3 Functional Description
The counter value stored in the CR register (bits
T[6:0]) is decremented every 16000 machine cy-
cles and the length of the timeout period can be
programmed by the user in 64 increments.
If the watchdog is activated (the WDGA bit is set)
and when the 7-bit timer (bits T[6:0]) rolls over
from 40h to 3Fh (T6 becomes cleared), it initiates
a reset cycle pulling low the reset pin for typically
30µs.
÷16000
Reset (if watchdog activated) when the T6 bit
reaches zero
Optional
(configurable by option byte)
Hardware Watchdog selectable by option byte
T3
T2
reset
T1
on
T0
HALT
instruction

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