ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 28

• Manufacturer Part Number: ST7FL15F1MAE
• Description: 8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7L15, ST7L19
SUPPLY, RESET AND CLOCK MANAGEMENT (cont’d)
7.6 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
the Low Voltage Detector (LVD) function. It is
managed by the SICSR register.
Note: A reset can also be triggered following the
detection of an illegal opcode or prebyte code. Re-
fer to
7.6.1 Low Voltage Detector (LVD)
The Low Voltage Detector (LVD) function gener-
ates a static reset when the V
below a V
it secures the power-up as well as the power-
down, keeping the ST7 in reset.
The V
lower than the V
on to avoid a parasitic reset when the MCU starts
running and sinks current on the supply (hystere-
sis).
The LVD Reset circuitry generates a reset when
V
The LVD function is illustrated in
Provided the minimum V
the oscillator frequency) is above V
MCU can only be in two modes:
Figure 16. Low Voltage Detector vs Reset
28/138
1
DD
– V
– V
V
V
RESET
IT+(LVD)
IT-(LVD)
is below:
section 12.2.1 on page 95
IT+(LVD)
IT-(LVD)
IT-(LVD)
IT-(LVD)
V
when V
reference value for a voltage drop is
when V
DD
IT+(LVD)
reference value. This means that
DD
DD
reference value for power-
is falling
is rising
DD
value (guaranteed for
DD
for further details.
supply voltage is
Figure
IT-(LVD)
16.
, the
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
The LVD is an optional function which can be se-
lected by the option byte.
Use of LVD with capacitive power supply: With this
type of power supply, if power cuts occur in the ap-
plication, it is recommended to pull V
0V to ensure optimum restart conditions. Refer to
the circuit example in
note 4.
For the application to function correctly, it is rec-
ommended to make sure that the V
age rises monotonously when the device is exiting
from RESET.
V
hys
– Under full software control
– In static safe reset
Figure 95 on page 119
DD
DD
supply volt-
down to
and