ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 41
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ST7FL15F1MAE
Manufacturer Part Number
ST7FL15F1MAE
Description
8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST7FL15F1MAE.pdf
(138 pages)
- Current page: 41 of 138
- Download datasheet (3Mb)
POWER SAVING MODES (cont’d)
Figure 28. AWUFH Mode Flowchart
Notes:
1. WDGHALT is an option bit. See option byte section for
more details.
2. Peripheral clocked with an external clock source can
still be active.
3. Only an AWUFH interrupt and some specific interrupts
can exit the MCU from HALT mode (such as external in-
terrupt). Refer to
for more details.
4. Before servicing an interrupt, the CC register is pushed
on the stack. The I[1:0] bits of the CC register are set to
(AWUCSR.AWUEN=1)
HALT INSTRUCTION
N
(Active Halt disabled)
WATCHDOG
WDGHALT
RESET
1
INTERRUPT
Y
Table 5, “Interrupt Mapping,” on page 32
1)
3)
ENABLE
256 OR 4096 CPU CLOCK
OR SERVICE INTERRUPT
0
FETCH RESET VECTOR
AWU RC OSC
AWU RC OSC
MAIN OSC
PERIPHERALS
CPU
MAIN OSC
PERIPHERALS
CPU
AWU RC OSC
MAIN OSC
PERIPHERALS
CPU
I[1:0] BITS
I[1:0] BITS
I[1:0] BITS
N
CYCLE
RESET
Y
WATCHDOG
DELAY
DISABLE
2)
OFF
OFF
OFF
OFF
OFF
XX
XX
OFF
ON
ON
5)
ON
ON
ON
ON
10
4)
4)
the current software priority level of the interrupt routine
and recovered when the CC register is popped.
5. If the PLL is enabled by the option byte, it outputs the
clock after an additional delay of t
STARTUP
ST7L15, ST7L19
(see
Figure
41/138
11).
1
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