MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 195
MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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7.2
The DBG sub-module relies on the external bus interface (generally the MEBI) when the DBG is matching
on the external bus.
The tag pins in
Freescale Semiconductor
PE3/LSTRB/ TAGLO
BKGD/MODC/
CPU PROGRAM COUNTER
INSTRUCTION
Pin Name
LAST CYCLE
BUS CLOCK
TAGHI
External Signal Description
WRITE DATA BUS
READ DATA BUS
ADDRESS BUS
WRITE DATA BUS
READ DATA BUS
READ/WRITE
DBG MODE ENABLE
CHANGE-OF-FLOW
INDICATORS
MCU IN BDM
DBG READ DATA BUS
Table 7-1
READ/WRITE
REGISTER
Pin Functions
Table 7-1. External System Pins Associated with DBG and MEBI
TAGLO
TAGHI
(part of the MEBI) may also be a part of the breakpoint operation.
Figure 7-2. DBG Block Diagram in DBG Mode
M
U
X
When instruction tagging is on, a 0 at the falling edge of E tags the high half of the
instruction word being read into the instruction queue.
In expanded wide mode or emulation narrow modes, when instruction tagging is on
and low strobe is enabled, a 0 at the falling edge of E tags the low half of the
instruction word being read into the instruction queue.
M
U
X
INSTRUCTION
ADDRESS/DATA/CONTROL
ADDRESS
M
U
X
COMPARATOR A
COMPARATOR B
COMPARATOR C
MC9S12Q128
LAST
REGISTERS
Rev 1.09
64 x 16 BIT
REGISTER
CAPTURE
PROFILE
BUFFER
TRACE
WORD
Chapter 7 Debug Module (DBGV1) Block Description
Description
CONTROL
MATCH_A
MATCH_B
MATCH_C
LOOP1
EVENT ONLY
POINTER
M
U
X
STORE
DETAIL
PROFILE CAPTURE MODE
CONTROL
TRACER
OR PROFILING DATA
BUFFER
LOGIC
TRACE BUFFER
TAG
FORCE
195
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