MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 398
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
If start bit verification is not successful, the RT clock is reset and a new search for a start bit begins.
To determine the value of a data bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10.
To verify a stop bit and to detect noise, recovery logic takes samples at RT8, RT9, and RT10.
summarizes the results of the stop bit samples.
398
Table 13-12
The RT8, RT9, and RT10 samples do not affect start bit verification. If any
or all of the RT8, RT9, and RT10 start bit samples are logic 1s following a
successful start bit verification, the noise flag (NF) is set and the receiver
assumes that the bit is a start bit (logic 0).
RT8, RT9, and RT10 Samples
RT8, RT9, and RT10 Samples
summarizes the results of the data bit samples.
RT3, RT5, and RT7 Samples
100
101
110
111
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
Table 13-11. Start Bit Verification
Table 13-13. Stop Bit Recovery
Table 13-12. Data Bit Recovery
MC9S12Q128
Rev 1.09
NOTE
Data Bit Determination
Framing Error Flag
Start Bit Verification
Yes
No
No
No
0
0
0
1
0
1
1
1
1
1
1
0
1
0
0
0
Noise Flag
Noise Flag
Noise Flag
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
Freescale Semiconductor
Table 13-13
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