MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 241
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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8.3.2.10
This read-only register contains the Conversion Complete Flags.
Read: Anytime
Write: Anytime, no effect
Freescale Semiconductor
Module Base + 0x000B
CCF[7:0]
Reset
Field
7–0
W
R
CCF7
Conversion Complete Flag x (x = 7, 6, 5, 4, 3, 2, 1, 0) — A conversion complete flag is set at the end of each
conversion in a conversion sequence. The flags are associated with the conversion position in a sequence (and
also the result register number). Therefore, CCF0 is set when the first conversion in a sequence is complete and
the result is available in result register ATDDR0; CCF1 is set when the second conversion in a sequence is
complete and the result is available in ATDDR1, and so forth. A flag CCFx (x = 7, 6, 5, 4, 3, 2, 1, 0) is cleared
when one of the following occurs:
0 Conversion number x not completed
1 Conversion number x has completed, result ready in ATDDRx
ATD Status Register 1 (ATDSTAT1)
0
7
A) Write to ATDCTL5 (a new conversion sequence is started)
B) If AFFC = 0 and read of ATDSTAT1 followed by read of result register ATDDRx
C) If AFFC = 1 and read of result register ATDDRx
= Unimplemented or Reserved
CCF6
0
6
Figure 8-12. ATD Status Register 1 (ATDSTAT1)
Table 8-16. ATDSTAT1 Field Descriptions
CCF5
0
5
MC9S12Q128
CCF4
Rev 1.09
0
4
Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
Description
CCF3
0
3
CCF2
0
2
CCF1
0
1
CCF0
0
0
241
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