MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 445

• Manufacturer Part Number: MC9S12Q
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

15.3.2.12 Main Timer Interrupt Flag 1 (TFLG1)
Read: Anytime
Write: Used in the clearing mechanism (set bits cause corresponding bits to be cleared). Writing a zero
will not affect current status of the bit.
15.3.2.13 Main Timer Interrupt Flag 2 (TFLG2)
TFLG2 indicates when interrupt conditions have occurred. To clear a bit in the flag register, write the bit
to one.
Read: Anytime
Write: Used in clearing mechanism (set bits cause corresponding bits to be cleared).
Any access to TCNT will clear TFLG2 register if the TFFCA bit in TSCR register is set.
Freescale Semiconductor
Module Base + 0x000E
Module Base + 0x000F
C[7:2]F
Reset
Reset
Field
Field
TOF
7:2
7
W
W
R
R
Input Capture/Output Compare Channel “x” Flag — These flags are set when an input capture or output
compare event occurs. Clear a channel flag by writing one to it.
When TFFCA bit in TSCR register is set, a read from an input capture or a write into an output compare channel
(0x0010–0x001F) will cause the corresponding channel flag CxF to be cleared.
TOF
Timer Overflow Flag — Set when 16-bit free-running timer overflows from 0xFFFF to 0x0000. This bit is cleared
automatically by a write to the TFLG2 register with bit 7 set. (See also TCRE control bit explanation.)
C7F
0
0
7
7
Unimplemented or Reserved
C6F
0
0
0
6
6
Figure 15-20. Main Timer Interrupt Flag 1 (TFLG1)
Figure 15-21. Main Timer Interrupt Flag 2 (TFLG2)
Table 15-14. TRLG1 Field Descriptions
Table 15-15. TRLG2 Field Descriptions
C5F
0
0
0
5
5
MC9S12Q128
Rev 1.09
C4F
0
0
0
4
4
Description
Description
Chapter 15 Timer Module (TIM16B6C) Block Description
C3F
0
0
0
3
3
C2F
0
0
0
2
2
0
0
0
1
1
0
0
0
0
0
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