TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 212

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. C – May 7, 1999
XRL <dest>,<src>
Function:
Logical Exclusive–OR for byte variables
Description:
Performs the bitwise logical Exclusive–OR operation ( ) between the specified variables, storing the results in the
destination. The destination operand can be the accumulator, a register or a direct address.
The two operands allow 12 addressing mode combinations. When the destination is the accumulator or a register, the
source addressing can be register, direct, register–indirect or immediate; when the destination is a direct address, the
source can be the accumulator or immediate data.
Note :
When this instruction is used to modify an output Port, the value used as the original Port data is read from the output data latch, not the input
pins.
Example :
The contains 0C3h (11000011B) and R0 contains 0AAh (10101010B). After executing the instruction, XRL A,R0 the
accumulator contains 69h (01101001B).
When the destination is a directly addressed byte, this instruction can complement combinations of bits in any RAM
location or hardware register. The pattern of bits to be complemented is then determined by a mask byte, either a
constant contained in the instruction or a variable computed in the accumulator at run time. The instruction XRL
P1,#00110001B complements bits 5, 4, and 0 of output Port 1.
XRL dir8,A
[Encoding]
XRL dir8,#data
[Encoding]
FLAGS :
Hex Code in:
Binary Mode = [Encoding]
Source Mode = [Encoding]
0110
0110
CY
_
0010
0011
AC
_
addr7-addr0
addr7-addr0
immed data
OV
_
Operation:
XRL
(dir8)
(dir8)
(A)
N
TSC80251
Z
5.167