TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 34

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. C – May 7, 1999
4.4.3. Logical Instructions
The C251 Architecture provides a set of instructions that perform logical operations. The ANL, ORL, and XRL (logical
AND, logical OR, and logical exclusive OR) instructions operate on bytes and words that are accessed via several
addressing modes (See Table 5.23). A byte register, word register, or the accumulator can be logically combined with
a register, im–mediate data, or data that is addressed directly or indirectly. These instructions affect the Z and N flags.
In addition to the CLR (clear), CPL (complement), SWAP (swap), and four rotate instructions that operate on the
accumulator, TSC80251 microcontrollers have three shift commands for byte and word registers :
4.4.4. Data Transfer Instructions
Data transfer instructions copy data from one register or memory location to another. These instructions include the
move instructions (See Table 5.24) and the exchange, PUSH, and pop instructions (See Table 5.24). Instructions that
move only a single bit are listed with the other bit instructions in Table 5.26.
MOV (Move) is the most versatile instruction, and its addressing modes are expanded in the C251 Architecture. MOV
can transfer a byte, word or dword between any two registers or between a register and any location in the address space.
The MOVX (Move External) instruction moves a byte from external memory to the accumulator or from the
accumulator to memory. The external memory is in the region specified by DPXL, whose reset value is 01h.
The MOVC (Move Code) instruction moves a byte from code memory (region FF:) to the accumulator.
MOVS (Move with Sign Extension) and MOVZ (Move with Zero Extension) move the contents of an 8–bit register
to the lower byte of a 16–bit register. The upper byte is filled with the sign bit (MOVS) or zeros (MOVZ). The MOVH
(Move to high Word) instruction places 16–bit immediate data into the high word of a dword register.
The XCH (Exchange) instruction interchanges the contents of the accumulator with a register or memory location. The
XCHD (Exchange Digit) instruction interchanges the lower nibble of the accumulator with the lower nibble of a byte
in on–chip RAM. XCHD is useful for BCD (binary coded decimal) operations.
The PUSH and POP instructions facilitate storing information (PUSH) and then retrieving it (POP) in reverse order.
PUSH can push a byte, a word or a dword onto the stack, using the immediate, direct or register addressing modes.
POP can pop a byte or a word from the stack to a register or to memory.
SLL (Shift Left Logical) shifts the register one bit left and replaces the LSB with 0.
SRL (Shift Right Logical) shifts the register one bit right and replaces the MSB with 0.
SRA (Shift Right Arithmetic) shifts the register one bit right; the MSB is unchanged.
TSC80251
4.9