TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 31

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

TSC80251
4.4.1.2. Immediate Addressing
4.4.1.3. Direct Addressing
4.4.1.4. Indirect Addressing
In arithmetic and logical instructions that use indirect addressing, the source operand is always a byte, and the
destination is either the accumulator or a byte register (R0-R15). The source address is a byte, word or dword. The two
architectures do indirect addressing via different registers:
4.6
Register
Immediate
Di
Direct
I di
Indirect
C251 Architecture
In the immediate addressing mode, the instruction contains the data operand itself. Byte operations use 8–bit
immediate data (#data); word operations use 16–bit immediate data (#data16). Dword operations use 16–bit
immediate data in the lower word and either zeros in the upper word (denoted by #0data16) or ones in the upper
word (denoted by #1data16). MOV instructions that place 16–bit immediate data into a dword register (DRk), place
the data either into the upper word while leaving the lower word unchanged, or into the lower word with a sign
extension or a zero extension.
The increment and decrement instructions contain immediate data (#short = 1, 2, or 4), which specifies the amount
of the increment/decrement.
C51 Architecture
Instructions use only 8–bit immediate data (#data).
C251 Architecture
In the direct addressing mode, the instruction contains the address of the data operand. The 8–bit direct mode
addresses on–chip RAM (dir8 = 00:0000h-00:007Fh) as both bytes and words, and addresses the SFRs (dir8 =
S:080h-S:1FFh) as bytes only. The 16–bit direct mode addresses both bytes and words in memory (dir16 =
00:0000h-00:FFFFh).
C51 Architecture
The 8–bit direct mode addresses 256 bytes of on–chip RAM (dir8 = 00h-7Fh) as bytes only and the SFRs (dir8 =
80h-FFh) as bytes only.
C251 Architecture
Memory is indirectly addressed via word and dword registers :
Word register (@WRj, j = 0, 2, 4, ..., 30)
The 16–bit address in WRj can access locations 00:0000h-00:FFFFh.
t
Mode
Table 4.5. Addressing Modes for Data Instruction in the C51 Architecture
00h-1Fh
Operand in Instruction
00h-7Fh
SFRs
00h-FFh
0000h-FFFFh
0000h-FFFFh
Address Range of
Operand
R0-R7 (Bank
selected by PSW)
#data = #00h-#FFh
dir8 = 00h-7Fh
dir8 = 80h-FFh
or SFR mnemonic
@R0, @R1
@DPTR,
@A+DPTR
@A+DPTR,
@A+PC
Reference
Language
Assembly
On-chip RAM
SFR address
Accesses on-chip RAM or the lowest 256
bytes of external data memory (MOVX)
Accesses external data memory (MOVX)
Accesses region FF : of code memory
(MOVC)
Comments
Rev. C – May 7, 1999