TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 48

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. C – May 7, 1999
rel
addr11
addr16
addr24
@Ri
Rn
n
Rm
Rmd
Rms
m, md, ms
WRj
WRjd
WRjs
@WRj
@WRj +dis16
j, jd, js
DRk
DRkd
DRks
@DRk
@DRk +dis16
k, kd, ks
Direct Address
Register
A signed (two’s complement) 8-bit relative address. The destination is
–128 to +127 bytes relative to the next instruction’s first byte.
An 11-bit target address. The target is in the same 2-Kbyte block of
memory as the next instruction’s first byte.
A 16-bit target address. The target can be anywhere within the same
64-Kbyte region as the next instruction’s first byte.
A 24-bit target address. The target can be anywhere within the
16–Mbyte address space.
A memory location (00h-FFh) addressed indirectly via byte registers R0
or R1
Byte register R0-R7 of the currently selected register bank
Byte register index: n= 0-7
Byte register R0-R15 of the currently selected register file
Destination register
Source register
Byte register index: m, md, ms= 0-15
Word register WR0, WR2, ..., WR30 of the currently selected register
file
Destination register
Source register
A memory location (00:0000h-00:FFFFh) addressed indirectly through
word register WR0-WR30, is the target address for jump instructions.
A memory location (00:0000h-00:FFFFh) addressed indirectly through
word register (WR0-WR30) + 16–bit signed (two’s complement)
displacement value
Word register index: j, jd, js= 0-30
Dword register DR0, DR4, ..., DR28, DR56, DR60 of the currently
selected register file
Destination register
Source register
A memory location (00:0000h-FF:FFFFh) addressed indirectly through
dword register DR0-DR28, DR56 and DR60, is the target address for
jump instruction
A memory location (00:0000h-FF:FFFFh) addressed indirectly through
dword register (DR0-DR28, DR56, DR60) + 16–bit (two’s complement)
signed displacement value
Dword register index: k, kd, ks= 0, 4, 8..., 28, 56, 60
Table 5.5. Notation for Destination in Control Instructions
Table 5.6. Notation for Register Operands
Description
Description
TSC80251
C251
C251
C51
C51
5.3