TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 57

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TSC80251

Manufacturer Part Number
TSC80251
Description
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet

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TSC80251
Notes:
1.
2.
3.
5.12
Clear Bit
Set Bit
Complement Bit
AND Carry with Bit
AND Carry with Complement of Bit
(CY)
OR Carry with Bit
OR Carry with Complement of Bit
(CY)
Move Bit to Carry
Move Bit from Carry
CLR
SETB
CPL
ANL
ANL
ORL
ORL
MOV
MOV
Mnemonic
Mnemonic
A shaded cell denotes an instruction in the C51 Architecture.
If this instruction addresses an I/O Port (Px, x= 0–3), add 1 to the number of states. Add 2 if it addresses a Peripheral SFR.
If this instruction addresses an I/O Port (Px, x= 0–3), add 2 to the number of states. Add 3 if it addresses a Peripheral SFR.
(CY)
(CY)
CY
bit51
bit
CY
bit51
bit
CY
bit51
bit
CY, bit51
CY, bit
CY, /bit51
CY, /bit
CY, bit51
CY, bit
CY, /bit51
CY, /bit
CY, bit51
CY, bit
bit51, CY
bit, CY
<src>
<dest>,
<dest>,
src opnd
src opnd
(1)
CLR <dest>
SETB <dest>
CPL <dest>
ANL CY, <src>
ORL CY, <src>
MOV CY, <src>
MOV <dest>, CY
Clear carry
Clear direct bit
Clear direct bit
Set carry
Set direct bit
Set direct bit
Complement carry
Complement direct bit
Complement direct bit
And direct bit to carry
And direct bit to carry
And complemented direct bit to carry
And complemented direct bit to carry
Or direct bit to carry
Or direct bit to carry
Or complemented direct bit to carry
Or complemented direct bit to carry
Move direct bit to carry
Move direct bit to carry
Move carry to direct bit
Move carry to direct bit
Table 5.16. Summary of Bit Instructions
Comments
Comments
dest opnd
dest opnd
dest opnd
(CY)
ANL CY, /<src>
(CY)
ORL CY, /<src>
(CY)
dest opnd
(CY)
(CY)
src opnd
Bytes
Binary Mode
1
2
4
1
2
4
1
2
4
2
4
2
4
2
4
2
4
2
4
2
4
(CY)
0
1
bit
src opnd
src opnd
States
2
4
2
4
2
4
1
3
1
3
1
3
1
3
1
3
2
4
1
1
1
(3)
(3)
(3)
(3)
(3)
(3)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
Rev. C – May 7, 1999
Bytes
Source Mode
1
2
3
1
2
3
1
2
3
2
3
2
3
2
3
2
3
2
3
2
3
States
2
3
2
3
2
3
1
2
1
2
1
2
1
2
1
2
2
3
1
1
1
(3)
(3)
(3)
(3)
(3)
(3)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)

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