HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 30

• Manufacturer Part Number: HT82A520R
• Description: Full Speed USB 8-Bit OTP MCU with SPI
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

a negative transition on the pin to wake-up the system.
When a Port pins wake-up occurs, the program will re-
sume execution at the instruction following the HALT in-
struction.
If the system is woken up by an interrupt, then two possi-
ble situations may occur. The first is where the related in-
terrupt is disabled or the interrupt is enabled but the stack
is full, in which case the program will resume execution at
the instruction following the HALT instruction. In this sit-
uation, the interrupt which woke-up the device will not be
immediately serviced, but will rather be serviced later
when the related interrupt is finally enabled or when a
stack level becomes free. The other situation is where the
related interrupt is enabled and the stack is not full, in
which case the regular interrupt response takes place. If
an interrupt request flag is set to 1 before entering the
Power Down Mode, the wake-up function of the related in-
terrupt will be disabled.
No matter what the source of the wake-up event is, once a
wake-up situation occurs, a time period equal to 1024 sys-
tem clock periods will be required before normal system
operation resumes. However, if the wake-up has origi-
nated due to an interrupt, the actual interrupt subroutine
execution will be delayed by an additional one or more cy-
cles. If the wake-up results in the execution of the next in-
struction following the HALT instruction, this will be
executed immediately after the 1024 system clock period
delay has ended.
Rev.1.00
Watchdog Timer Register
Watchdog Timer
30
Watchdog Timer
The Watchdog Timer is provided to prevent program mal-
functions or sequences from jumping to unknown loca-
tions, due to certain uncontrollable external events such
as electrical noise. It operates by providing a device reset
when the WDT counter overflows. The WDT clock is sup-
plied by one of two sources selected by configuration op-
tion: its own self-contained dedicated internal WDT
oscillator, or the instruction clock which is the system clock
divided by 4. Note that if the WDT configuration option has
been disabled, then any instruction relating to its opera-
tion will result in no operation.
The internal WDT oscillator has an approximate period of
31 s at a supply voltage of 5V. If selected, it is first divided
by 256 via an 8-stage counter to give a nominal period of
8ms. Note that this period can vary with VDD, temperature
and process variations. For longer WDT time-out periods
the WDT prescaler can be utilized. By writing the required
value to bits 0, 1 and 2 of the WDTS register, known as
WS0, WS1 and WS2, longer time-out periods can be
achieved. With WS0, WS1 and WS2 all equal to 1, the di-
vision ratio is 1:128 which gives a maximum time-out pe-
riod of about 1s.
A configuration option can select the instruction clock,
which is the system clock divided by 4, as the WDT clock
source instead of the internal WDT oscillator. If the instruc-
tion clock is used as the clock source, it must be noted that
when the system enters the Power Down Mode, as the
HT82A520R/HT82A620R
October 23, 2009