HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 41

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HT82A520R

Manufacturer Part Number
HT82A520R
Description
Full Speed USB 8-Bit OTP MCU with SPI
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
SPI Configuration Options and Status Control
One option is to enable the operation of the WCOL, write collision bit, in the SBCR register. Some control in SPIR register.
The SPI_CPOL select the clock polarity of the SCK line . The SPI_MODE select SPI data output mode.
SPI include four pins , can share I/O mode status . The status control combine with four bits for SPIR and SBCR regis-
ter. Include SPI_CSEN , SPI_EN for SPIR register and CSEN ,SBEN for SBCR register.
Note:
Error Detection
The WCOL bit in the SBCR register is provided to indicate
errors during data transfer. The bit is set by the Serial In-
terface but must be cleared by the application program.
This bit indicates a data collision has occurred which hap-
pens if a write to the SBDR register takes place during a
data transfer operation and will prevent the write operation
from continuing. The bit will be set high by the Serial Inter-
face but has to be cleared by the user application pro-
gram. The overall function of the WCOL bit can be
disabled or enabled by a configuration option.
Rev.1.00
SPI_EN
0
1
1
1
1
1
X: don t care
(Z) floating
Control Bit for Register
SPI_CSEN
x
0
0
1
1
1
SBEN
x
0
1
0
1
1
CSEN
SPI Interface Control Register
x
x
x
x
0
1
SPI mode (Z)
SPI mode
I/O mode
I/O mode
I/O mode
I/O mode
41
SCS
Programming Considerations
When the device is placed into the Power Down Mode
note that data reception and transmission will continue.
The TRF bit is used to generate an interrupt when the data
has been transferred or received.
SPI Share Function Pins Status
SPI mode
SPI mode
SPI mode
I/O mode
I/O mode
I/O mode
SCK
HT82A520R/HT82A620R
SPI mode
SPI mode
SPI mode
I/O mode
I/O mode
I/O mode
SDO
October 23, 2009
SPI mode (Z)
SPI mode (Z)
SPI mode (Z)
I/O mode
I/O mode
I/O mode
SDI

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