HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 50

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HT82A520R

Manufacturer Part Number
HT82A520R
Description
Full Speed USB 8-Bit OTP MCU with SPI
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
The total FIFO size is 64+8 bytes. All endpoints except EP0 can be defined by registers UFOEN, UFIEN, UFC0 and
UFC. There are three FIFO mapped as follow:
8 bytes FIFO for Endpoint0
RAM0 FIFO for other input Endpoint (1~3)
RAM1 FIFO for other output Endpoint (1~3)
Configuration Options
Rev.1.00
Bit No.
0~3
4~7
No.
10
11
12
13
14
16
17
18
1
2
3
4
5
6
7
8
9
PA pull-high enable/disable by bit
PB pull-high enable/disable by nibble
PC pull-high enable/disable by nibble
PB wake-up enable/disable by nibble
PC wake-up enable/disable by nibble
USB D- pin internal 1.5k resistor enable/disable
USB D+ pin internal 7.5k resistor enable/disable
TBHP enable or disable
Low voltage reset: enable/disable
WDT enable/disable
WDT clock source: f
CLR WDT instructions: one or two clear WDT instruction(s)
PA NMOS or CMOS output type
PA wake-up enable/disable by bit
PB7 mode: GPIO or V
VDD PB0~PB6: PB0~PB6 power source from V
SPI_WCOL: enable/disable
FIFO0~
FIFO3
Label
FIFO0~FIFO3 USB Endpoint Accessing Registers Definitions
R/W
R/W
SYS
DDIO
EPi accessing register (i=0~3). When an endpoint is disabled, the corresponding
accessing register should be disabled.
Unused bit, read as 0
/4 or WDTOSC (32K RC)
pin for PB0~PB6 power source
50
Options
DD
or V
DDIO
Function
HT82A520R/HT82A620R
October 23, 2009

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