HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 37

• Manufacturer Part Number: HT82A520R
• Description: Full Speed USB 8-Bit OTP MCU with SPI
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Note:
The A/D conversion timing diagram shows graphically the
various stages involved in an analog to digital conversion
process and its associated timing.
The setting up and operation of the A/D converter function
is fully under the control of the application program as
there are no configuration options associated with the A/D
converter. After an A/D conversion process has been initi-
ated by the application program, the microcontroller inter-
nal hardware will begin to carry out the conversion, during
which time the program can continue with other functions.
The time taken for the A/D conversion is 16t
equal to the A/D clock period.
Programming Considerations
When programming, special attention must be given to
the A/D channel selection bits in the ADSR register. If
these bits are all cleared to zero no external pins will be
selected for use as A/D input pins allowing the pins to be
used as normal I/O pins. When this happens the power
supplied to the internal A/D circuitry will be reduced result-
ing in a reduction of supply current. This ability to reduce
power by turning off the internal A/D function by clearing
the A/D channel selection bits may be an important con-
sideration in battery powered applications.
Another important programming consideration is that
when the A/D channel selection bits change value, the
A/D converter must be re-initialised. This is achieved by
Example: using an EOCB polling method to detect the end of conversion
Start_conversion:
Polling_EOC:
Rev.1.00
clr EADI
mov a,00011001B
mov acsr,a
mov a,00000000B
mov adcr,a
Set
clr START
set START
clr START
sz
jmp polling_EOC
mov a,ADR
mov adrl_buffer,a
jmp start_conversion
When checking for the end of the conversion pro-
cess, if the method of polling the EOCB bit in the
ADCR register is used, the interrupt enable step
above can be omitted.
ADON
EOCB
:
; A/D on
; disable ADC interrupt
; setup the ACSR register to select fsys/6 as the A/D clock
; setup the ACSR register to configure Port PB0~PB2 as A/D
; Inputs
; setup the ADCR register and select AN0 to be connected to
; the A/D converter
; As the Port B and Port C channel bits have changed the
; following START signal (0 1 0) must be issued within
; 10 instruction cycles
; reset A/D
; start A/D
; poll the ADCR register EOCB bit to detect end
; of A/D conversion
; continue polling
; read conversion result value
; save result to user defined register
; start next A/D conversion
AD
where t
AD
is
37
pulsing the START bit in the ADCR register immediately
after the channel selection bits have changed state. The
exception to this is where the channel selection bits are all
cleared, in which case the A/D converter is not required to
be re-initialised.
A/D Programming Example
The following two programming examples illustrate how to
setup and implement an A/D conversion. In the first exam-
ple, the method of polling the EOCB bit in the ADCR regis-
ter is used to detect when the conversion cycle is
complete, whereas in the second example, the A/D inter-
rupt is used to determine when the conversion is com-
plete.
A/D Transfer Function
As the device contain a 12-bit A/D converter, its full-scale
converted digitised value is equal to FFFH. Since the
full-scale analog input value is equal to the VDD voltage,
this gives a single bit analog input value of V
diagram show the ideal transfer function between the ana-
log input value and the digitised output value for the A/D
converter.
Note that to reduce the quantisation error, a 2.5 LSB offset
is added to the A/D Converter input. Except for the digit-
ised zero value, the subsequent digitised values will
change at a point 2.5 LSB below where they would
change without the offset, and the last full scale digitised
value will change at a point 2.5 LSB below the V
HT82A520R/HT82A620R
October 23, 2009
DD
/4096. The
DD
level.