HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 49

• Manufacturer Part Number: HT82A520R
• Description: Full Speed USB 8-Bit OTP MCU with SPI
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Note:
Note:
Rev.1.00
Bit No.
Bit No.
Bit No.
4~7
4~7
0
1
2
3
0
1
2
3
0
1
2
3
4
5
6
7
the host sending an abnormal IN or OUT token and disabling the endpoint.
Data toggle) first. So, when the Device receives a set configuration setup command, the user needs to toggle
this bit as the following data will send a Data0 first.
the host sending a abnormal IN or OUT token and disabling the endpoint.
* It is only required to set the data pipe as an input pile or output pile. The purpose of this function is to avoid
* USB definition: when the host sends a set Configuration , the Data pipe should send the DATA0 (about the
** It is only required to set the data pipe as an input pile or output pile. The purpose of this function is to avoid
RAM_def0
RAM_def1
DATATG*
FIFO_def
SETO1**
SETO2**
SETO3**
SETI1*
SETI2*
SETI3*
E1FS0
E1FS1
E2FS0
E2FS1
E3FS0
E3FS1
Label
Label
Label
UFOEN Register, USB Endpoint 1~Endpoint 3 set OUT pipe enable register
UFIEN Register, USB Endpoint 1~Endpoint 3 set IN Pipe Enable Register.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Once this bit set to 1 by Firmware, The SIE should redefine the FIFO configura-
tion. This bit is automatically cleared by SIE
Input FIFO for EP1 enable 1/disable 0; default disable
Input FIFO for EP2 enable 1/disable 0; default disable
Input FIFO for EP3 enable 1/disable 0; default disable
Unused bit, read as 0
DATA token toggle bit
Output FIFO for EP1 enable 1/disable 0; default disable
Output FIFO for EP2 enable 1/disable 0; default disable
Output FIFO for EP3 enable 1/disable 0; default disable
Unused bit, read as 0
00: RAM0 input FIFO, RAM1 output FIFO (default)
01: Both RAM0 and RAM1 are output FIFO
10: Both RAM0 and RAM1 are input FIFO
11: RAM0 output FIFO, RAM1 input FIFO
Define endpoint 1 FIFO size
E1FS1, E1FS0:
00: 8-byte (default)
01: 16-byte
10: 32-byte
11: 64-byte
Define endpoint 2 FIFO size
E2FS1, E2FS0:
00: 8-byte (default)
01: 16-byte
10: 32-byte
11: 64-byte
Define endpoint 3 FIFO size
E3FS1, E3FS0:
00: 8-byte (default)
01: 16-byte
10: 32-byte
11: 64-byte
UFC0 USB FIFO Size Control Register 0
49
Function
Function
Function
HT82A520R/HT82A620R
October 23, 2009