HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 39

• Manufacturer Part Number: HT82A520R
• Description: Full Speed USB 8-Bit OTP MCU with SPI
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Note:
Rev.1.00
Bit No.
7~4
0
1
2
3
WCOL: set by SPI cleared by users
CSEN: enable/disable chip selection function pin
SBEN: enable/disable serial bus (0: initialise all status flags)
TRF: 1 = data transmitted or received, 0= data is transmitting or still not received
CPOL: I/O = clock polarity rising/falling edge: For SPIR Register.
If clock polarity set to rising edge (SPI_CPOL=1), serial clock timing follow SCK, otherwise (SPI_CPOL=0)
SCK is the serial clock timing.
SPI_CPOL
SPI_MODE
SPI_CSEN
SPI_EN
Reserved bit
master mode: 1/0 = with/without SCS output function
Slave mode: 1/0 = with/without SCS input control function
when SBEN=0, all status flags should be initialised
when SBEN=1, all SPI related function pins should stay at floating state
Label
R/W
R/W
R/W
R/W
R/W
R/W
1: clock polarity rising
0: clock polarity falling (default falling)
0: SPI output the data in the rising edge(polarity=1) or falling edge (polarity=0);
SPI read data in the in the falling edge(polarity=1) or rising edge (polarity=0);
(default)
1: SPI first output the data immediately after the SPI is enable. And SPI output
the data in the falling edge(polarity=1) or rising edge (polarity=0); SPI read data
in the in the rising edge(polarity=1) or falling edge (polarity=0)
1: SPI_CSEN Enable , this bit is used to enable/disable software CSEN func-
tion
0: SPI_CSEN disable, SCS define as GPIO (default disable)
This bit control the shared PIN (SCS, SDI, SDO and SCK) is SPI or GPIO mode
0: I/O mode (default)
1: SPI mode
Always 0
SPI Block Diagram
SPIR Register
39
Function
HT82A520R/HT82A620R
October 23, 2009