HD6412350 Hitachi, HD6412350 Datasheet - Page 12

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

7.6
7.7
Section 8
8.1
8.2
8.3
8.4
8.5
vi
7.5.9
7.5.10 DMAC Bus Cycles (Dual Address Mode) ........................................................... 256
7.5.11 DMAC Bus Cycles (Single Address Mode) ......................................................... 264
7.5.12 Write Data Buffer Function .................................................................................. 270
7.5.13 DMAC Multi-Channel Operation ......................................................................... 271
7.5.14 Relation Between External Bus Requests, Refresh Cycles, the DTC,
7.5.15 NMI Interrupts and DMAC .................................................................................. 274
7.5.16 Forced Termination of DMAC Operation ............................................................ 275
7.5.17 Clearing Full Address Mode................................................................................. 276
Interrupts ............................................................................................................................ 277
Usage Notes ....................................................................................................................... 278
Overview............................................................................................................................ 283
8.1.1
8.1.2
8.1.3
Register Descriptions ......................................................................................................... 286
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9
Operation............................................................................................................................ 293
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
8.3.7
8.3.8
8.3.9
8.3.10 Number of DTC Execution States ........................................................................ 306
8.3.11 Procedures for Using DTC.................................................................................... 308
8.3.12 Examples of Use of the DTC................................................................................ 309
Interrupts ............................................................................................................................ 311
Usage Notes ....................................................................................................................... 312
Basic DMAC Bus Cycles...................................................................................... 255
and the DMAC...................................................................................................... 273
Data Transfer Controller
Features ................................................................................................................. 283
Block Diagram...................................................................................................... 284
Register Configuration.......................................................................................... 285
DTC Mode Register A (MRA) ............................................................................. 286
DTC Mode Register B (MRB).............................................................................. 288
DTC Source Address Register (SAR) .................................................................. 289
DTC Destination Address Register (DAR) .......................................................... 289
DTC Transfer Count Register A (CRA) ............................................................... 289
DTC Transfer Count Register B (CRB)................................................................ 290
DTC Enable Registers (DTCER).......................................................................... 290
DTC Vector Register (DTVECR) ........................................................................ 291
Module Stop Control Register (MSTPCR)........................................................... 292
Overview............................................................................................................... 293
Activation Sources................................................................................................ 295
DTC Vector Table ................................................................................................ 296
Location of Register Information in Address Space............................................. 299
Normal Mode........................................................................................................ 300
Repeat Mode ......................................................................................................... 301
Block Transfer Mode............................................................................................ 302
Chain Transfer ...................................................................................................... 304
Operation Timing.................................................................................................. 305
............................................................................... 283