HD6412350 Hitachi, HD6412350 Datasheet - Page 167
HD6412350
Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6412350.pdf
(989 pages)
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6.4
6.4.1
The basic bus interface enables direct connection of ROM, SRAM, and so on.
The bus specifications can be selected with ABWCR, ASTCR, WCRH, and WCRL (see table
6-3).
6.4.2
Data sizes for the CPU and other internal bus masters are byte, word, and longword. The bus
controller has a data alignment function, and when accessing external space, controls whether the
upper data bus (D
for the area being accessed (8-bit access space or 16-bit access space) and the data size.
8-Bit Access Space: Figure 6-4 illustrates data alignment control for the 8-bit access space. With
the 8-bit access space, the upper data bus (D
data that can be accessed at one time is one byte: a word transfer instruction is performed as two
byte accesses, and a longword transfer instruction, as four byte accesses.
Byte size
Word size
Longword size
Figure 6-4 Access Sizes and Data Alignment Control (8-Bit Access Space)
Basic Bus Interface
Overview
Data Size and Data Alignment
15
to D
8
) or lower data bus (D
1st bus cycle
2nd bus cycle
1st bus cycle
2nd bus cycle
3rd bus cycle
4th bus cycle
15
to D
7
D
to D
15
Upper data bus
8
) is always used for accesses. The amount of
0
) is used according to the bus specifications
D
8
D
7
Lower data bus
D
0
147
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