HD6412350 Hitachi, HD6412350 Datasheet - Page 602
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HD6412350
Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet
1.HD6412350.pdf
(989 pages)
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582
Serial clock
Serial data
TDRE
TEND
Serial data reception (clocked synchronous mode)
Figure 13-18 shows a sample flowchart for serial reception.
The following procedure should be used for serial data reception.
When changing the operating mode from asynchronous to clocked synchronous, be sure to
check that the ORER, PER, and FER flags are all cleared to 0.
The RDRF flag will not be set if the FER or PER flag is set to 1, and neither transmit nor
receive operations will be possible.
TXI interrupt
request generated
Figure 13-17 Example of SCI Operation in Transmission
interrupt service routine
Data written to TDR
cleared to 0 in TXI
Bit 7
and TDRE flag
Transfer direction
Bit 0
1 frame
TXI interrupt
request generated
Bit 7
Bit 0
Bit 1
Bit 6
TEI interrupt
request generated
Bit 7
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