HD6412350 Hitachi, HD6412350 Datasheet - Page 195

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HD6412350

Manufacturer Part Number
HD6412350
Description
(HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
Manufacturer
Hitachi
Datasheet

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6.6.2
When DRAM space is accessed in DMAC single address mode, full access (normal access) is
always performed. The DACK output goes low from the T
interface.
In modes other than DMAC single address mode, burst access can be used when accessing DRAM
space.
Figure 6-29 shows the DACK output timing for the DRAM interface when DDS = 0.
Figure 6-29 DACK Output Timing when DDS = 0 (Example of DRAM Access)
When DDS = 0
Read
Write
LCAS (LCAS)
CAS, (UCAS)
HWR, (WE)
HWR, (WE)
CSn (RAS)
D
D
A
15
15
23
DACK
to D
to D
to A
ø
0
0
0
T
p
Row
T
r
r
state in the case of the DRAM
T
c1
Column
T
c2
175

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