HD6412350 Hitachi, HD6412350 Datasheet - Page 250

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

7.5.2
Sequential mode can be specified by clearing the RPE bit in DMACR to 0. In sequential mode,
MAR is updated after each byte or word transfer in response to a single transfer request, and this is
executed the number of times specified in ETCR.
One address is specified by MAR, and the other by IOAR. The transfer direction can be specified
by the DTDIR bit in DMACR.
Table 7-6 summarizes register functions in sequential mode.
Table 7-6
Register
Legend
MAR
IOAR : I/O address register
ETCR : Transfer count register
DTDIR : Data transfer direction bit
MAR specifies the start address of the transfer source or transfer destination as 24 bits. MAR is
incremented or decremented by 1 or 2 each time a byte or word is transferred.
IOAR specifies the lower 16 bits of the other address. The 8 bits above IOAR have a value of
H'FF.
230
23
23
H'FF
: Memory address register
15
15
Sequential Mode
MAR
Register Functions in Sequential Mode
ETCR
IOAR
0
0
0
DTDIR = 0 DTDIR = 1 Initial Setting
Source
address
register
Destination
address
register
Transfer counter
Function
Destination
address
register
Source
address
register
Start address of
transfer destination
or transfer source
Start address of
transfer source or
transfer destination
Number of transfers Decremented every
Incremented/
decremented every
transfer
Fixed
transfer; transfer
ends when count
reaches H'0000
Operation