HD6412350 Hitachi, HD6412350 Datasheet - Page 688

• Manufacturer Part Number: HD6412350
• Description: (HD6412350 / HD6432351) 16-BIT MICROCONTROLLER
• Manufacturer: Hitachi

Bit 3—Output Port Enable (OPE): Specifies whether the output of the address bus and bus
control signals (CS0 to CS7, AS, RD, HWR, LWR, CAS) is retained or set to the high-impedance
state in software standby mode.
Bit 3
OPE
0
1
Bits 2 and 1—Reserved: Read-only bits, always read as 0.
Bit 0—Reserved: This bit can be read or written to, but only 0 should be written.
20.2.2
SCKCR is an 8-bit readable/writable register that performs ø clock output control and medium-
speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—ø Clock Output Disable (PSTOP): Controls ø output.
Bit 7
PSTOP
0
1
Bits 6—Reserved: This bit can be read or written to, but only 0 should be written.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
668
Bit
Initial value
R/W
System Clock Control Register (SCKCR)
Normal
Operating Mode
ø output (initial value)
Fixed high
Description
In software standby mode, address bus and bus control signals are high-impedance
In software standby mode, address bus and bus control signals retain output state
:
:
:
PSTOP
R/W
7
0
R/W
—
6
0
Sleep Mode
ø output
Fixed high
—
—
5
0
Description
—
—
4
0
Software
Standby Mode
Fixed high
Fixed high
—
—
3
0
SCK2
R/W
2
0
Hardware
Standby Mode
High impedance
High impedance
SCK1
R/W
1
0
(Initial value)
SCK0
R/W
0
0