PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 19

• Manufacturer Part Number: PC87332VLJ-5
• Description: PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
• Manufacturer: NSC [National Semiconductor]

2 0 Configuration Registers
2 3 HARDWARE CONFIGURATION
During reset one of 32 possible sets of default values are
loaded into the first three Configuration Registers A strap-
ping option on five pins (CFG0–4) selects the set of values
that is loaded This allows for automatic configuration with-
out software intervention Table 2-1 shows the 32 possible
default configurations The default configuration can be
modified by software at any time after reset by using the
access procedure described in the Software Configuration
Section
Table 2-1 is organized as follows The logic values of the
five external Configuration Pins are associated with the re-
sulting Configuration Register Data and the activated func-
tions The activated functions are grouped into seven cate-
gories based on the data in the FER In some cases the
data in the FER is given as one of two options This is be-
cause the primary or secondary IDE address is chosen via
the FER
The PTR has one value associated with the active functions
in the FER This value allows the power-down of all clocks
when the PWDN pin goes active In the last case where no
functions are active after reset activating the PWDN pin
also stops the crystal
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Configuration Pins (CFGn)
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TABLE 2-1 Default Configurations Controlled by Hardware
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
(Continued)
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
19
FER
PTR
FAR
FAR
FAR
FAR
FAR
FAR
FER
PTR
FAR
FAR
FAR
FAR
FAR
FAR
FER
PTR
FAR
FAR
FAR
FAR
Most of the variability available is through the FAR Ad-
dresses controlled by the FAR are coded as follows
PRI
SEC
COM1 is the UART address at 3F8– Fh
COM2 is the UART address at 2F8– Fh
COM3 is the UART address at 3E8 – Fh
COM4 is the UART address at 2E8 – Fh
LPTA
LPTB
The chosen addresses are given under active functions and
are in the same order as the active functions with which
they are associated In other words if the active functions
are given as FDC IDE UART1 UART2
addresses are given as PRI PRI COM1 COM2 LPTB then
the functions and the addresses are associated as follows
FDC
UART2
(Hex)
Data
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
e
4F CF
00 80
10
11
11
39
24
38
4B CB
00 80
00
01
01
09
08
08
0F
00 80
10
11
39
24
e
is the PRImary floppy or IDE address (i e 3F0– 7h
or 1F0– 7 3F6 7h)
is the SECondary IDE address (170– 7 376 7h)
is the parallel port (
3BEh
is the
e
COM2
PRI
ll
PORT address at 378– 37Fh
ll
IDE
PORT
FDC IDE UART1 UART2
Power-Down Clocks Option
PRI PRI COM1 COM2 LPTB
PRI PRI COM1 COM2 LPTA
PRI SEC COM1 COM2 LPTA
PRI PRI COM3 COM4 LPTA
PRI PRI COM2 COM3 LPTB
PRI SEC COM3 COM4 LPTB
FDC IDE UART1
Power-Down Clocks Option
PRI PRI COM1 LPTB
PRI PRI COM1 LPTA
PRI SEC COM1 LPTA
PRI PRI COM3 LPTA
PRI PRI COM3 LPTB
PRI SEC COM3 LPTB
FDC UART1 UART2
Power-Down Clocks Option
PRI COM1 COM2 LPTB
PRI COM1 COM2 LPTA
PRI COM3 COM4 LPTA
PRI COM2 COM3 LPTB
e
e
Activated Functions
ll
PRI
LPTB
PORT ) address at 3BC–
UART1
ll
ll
PORT
PORT and the
ll
PORT
e
ll
PORT
COM1