PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 41

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PC87332VLJ-5

Manufacturer Part Number
PC87332VLJ-5
Description
PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
Manufacturer
NSC [National Semiconductor]
Datasheet
4 0 FDC Command Set Description
Looking at the second command byte DC3–0 corresponds
to the four logical drives
A 0 written to DCn sets drive n to conventional mode and a
1 sets drive n to perpendicular mode The OW (Overwrite)
bit offers additional control When OW
DC3 –0 (drive configuration bits) are changeable When OW
less of what is written to DC3–0
The function of the DCn bits must also be qualified by set-
ting both WG and GAP to 0 If WG and GAP are used (i e
not set to 00) they override whatever is programmed in the
DCn bits Table 4-7 indicates the operation of the FDC
based on the values of GAP and WG Note that when GAP
and WG are both 0 the DCn bits are used to configure each
logical drive as conventional or perpendicular DC3– 0 is un-
affected by a software reset but WG and GAP are both
cleared to 0 after a software reset A hardware reset resets
all the bits to zero (conventional mode for all drives) The
Perpendicular Mode command bits may be rewritten at any
time
Note When in the Perpendicular Mode for any drive at any data rate select-
Perpendicular Recording type disk drives have a Pre-Erase
Head which leads the Read Write Head by 200 m which
translates to 38 bytes at the 1 Mbps data transfer rate (19
bytes at 500 kbps) The increased spacing between the two
heads requires a larger GAP2 between the Address Field
and Data Field of a sector at 1 Mbps 2 Mbps (See Perpen-
dicular Format in Table 4-1 ) This GAP2 length of 41 bytes
(at 1 Mbps 2 Mbps) ensures that the Preamble in the Data
Field is completely ‘‘pre-erased’’ by the Pre-Erase Head
Also during Write Data operations to a perpendicular drive
a portion of GAP2 must be rewritten by the controller to
guarantee that the Data Field Preamble has been pre-
erased (see Table 4-6)
4 1 9 Read Data Command
The Read Data command reads logical sectors containing a
Normal Data Address Mark (AM) from the selected drive
and makes the data available to the host P After the last
Command Phase byte is written the controller simulates the
Motor On time for the selected drive internally The user
must turn on the drive motor directly by enabling the appro-
priate drive and motor select disk interface outputs with the
Digital Output Register (DOR)
If Implied Seeks are enabled the controller performs a Seek
operation to the track number specified in the Command
Phase The controller also issues a Sense Interrupt for the
seek and waits the Head Settle time specified in the Mode
command
The correct ID information (track head sector bytes per
sector) for the desired sector must be specified in the com-
mand bytes See Table 4-8 Sector Size Selection for details
e
0 the internal values of DC3–0 are unaffected regard-
ed by the DC3–0 bits write precompensation is set to zero
e
1 the values of
(Continued)
41
on the bytes per sector code In addition the End of Track
Sector Number (EOT) should be specified allowing the con-
troller to read multiple sectors The Data Length byte is a
don’t care and should be set to FFh
The controller then starts the Data Separator and waits for
the Data Separator to find the next sector Address Field
The controller compares the Address Field ID information
(track head sector bytes per sector) with the desired ID
specified in the Command Phase If the sector ID bytes do
not match then the controller waits for the Data Separator
to find the next sector Address Field The ID comparison
process repeats until the Data Separator finds a sector Ad-
dress Field ID that matches that in the command bytes or
until an error occurs Possible errors are
1 The
2 Two index pulses were detected since the search began
3 The Address Field was found with a CRC error The CE
Once the desired sector Address Field is found the control-
ler waits for the Data Separator to find the subsequent Data
Field for that sector If the Data Field (normal or deleted) is
not found within the expected time the controller terminates
the operation and enters the Result Phase (MD is set in
ST2) If a Deleted Data Mark is found and Skip Flag (SK)
was set in the Opcode command byte the controller skips
this sector and searches for the next sector Address Field
as described above The effect of SK on the Read Data
command is summarized in Table 4-9
there is no disk in the drive the controller hangs up The
writing a byte to the FIFO This puts the controller into the
Result Phase
and no valid ID has been found If the track address ID
differs the WT bit or BT bit (if the track address is FFh) is
set in ST2 If the head sector or bytes per sector code
did not match the ND bit is set in ST1 If the Address
Field AM was never found the MA bit is set in ST1
bit is set in ST1
P must then take the controller out of this hung state by
Sector Code
Bytes per
P aborted the command by writing to the FIFO If
TABLE 4-8 Sector Size Selection
0
1
2
3
4
5
6
7
Number of Bytes
in Data Field
16384
1024
2048
4096
8192
128
256
512

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