PC87332VLJ-5 NSC [National Semiconductor], PC87332VLJ-5 Datasheet - Page 42

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PC87332VLJ-5

Manufacturer Part Number
PC87332VLJ-5
Description
PC87332VLJ (3.3V/5V) and PC87332VLJ-5 (5V) (SuperI/OTM III Premium Green) Floppy Disk Controller, Dual UARTs, IEEE1284 Parallel Port, and IDE Interfac
Manufacturer
NSC [National Semiconductor]
Datasheet
4 0 FDC Command Set Description
Having found the Data Field the controller then transfers
data bytes from the disk drive to the host (described in
Section 5 3 Controller Phases) until the bytes per sector
count has been reached or the host terminates the opera-
tion (through TC end of track or implicitly through overrun)
The controller then generates the CRC for the sector and
compares this value with the CRC at the end of the Data
Field
Having finished reading the sector the controller continues
reading the next logical sector unless one or more of the
following termination conditions occurred
1 The DMA controller asserted TC The IC bits in ST0 are
2 The last sector address (of side 1 if MT was set) was
3 Overrun error The OR bit in ST1 is set The IC bits in ST0
4 CRC error The CE bit in ST1 and the CD bit in ST2 are
If Multi-Track Selector (MT) was set in the Opcode com-
mand byte and the last sector of side 0 has been trans-
ferred the controller then continues with side 1
Upon terminating the Execution Phase of the Read Data
command the controller asserts IRQ6 indicating the begin-
ning of the Result Phase The P must then read the result
bytes from the FIFO The values that are read back in the
result bytes are shown in Table 4-10 If an error occurs the
result bytes indicate the sector read when the error oc-
curred
EOT
NC
set to Normal Termination
equal to EOT The EOT bit in ST1 is set The IC bits in
ST0 are set to Abnormal Termination This is the expect-
ed condition during Non-DMA transfers
are set to Abnormal Termination If the P cannot service
a transfer request in time the last correctly read byte is
transferred
set The IC bits in ST0 are set to Abnormal Termination
MT
e
SK
0
0
0
0
1
1
1
1
e
0
0
1
1
No Change in Value
End of Track Sector Number from Command Phase
HD
0
0
1
1
0
0
1
1
Data Type
Deleted
Deleted
Normal
Normal
TABLE 4-10 Result Phase Termination Values with No Error
Sector
e
e
e
e
k
k
k
k
Last
EOT
EOT
EOT
EOT
TABLE 4-9 SK Effect on the Read Data Command
EOT
EOT
EOT
EOT
Sector Read
Y
Y
Y
N
Track
T
T
T
S
T
NC
NC
NC
NC
NC
a
a
a
e
e
Sector Number last operated on by controller
Track Number programmed in Command Phase
(Continued)
1
1
1
42
Command Phase
Execution Phase Data read from disk drive is transferred
to system via DMA or Non-DMA modes
Result Phase
IPS
MT
CM Bit (ST2)
Head
ID Information at Result Phase
NC
NC
NC
NC
NC
NC
1
0
MFM
0
1
0
1
X
End of Track Sector Number
SK
X
Intersector Gap Length
Drive Head Number
Status Register 0
Status Register 1
Status Register 2
Bytes per Sector
Bytes per Sector
Sector
S
S
S
S
Sector Number
Sector Number
Track Number
Track Number
Head Number
Data Length
a
a
a
a
1
1
1
1
X
0
1
1
1
1
Normal Termination
No Further Sectors Read
Normal Termination
Sector Skipped
Description of Results
X
0
HD
1
Bytes Sector
DR1
1
NC
NC
NC
NC
NC
NC
NC
NC
DR0
0

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