AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 40
AM49BDS640AHD8I
Manufacturer Part Number
AM49BDS640AHD8I
Description
Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
Manufacturer
SPANSION [SPANSION]
Datasheet
1.AM49BDS640AHD8I.pdf
(84 pages)
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14. The system may read and program in non-erasing sectors, or
15. The Erase Resume command is valid only during the Erase
16. See “Set Configuration Register Command Sequence” for details.
17. Command is valid when device is ready to read array data or
18. The Reset command returns the device to reading the array.
19. Regardless of CLK and AVD# interaction or Control Register bit
20. ACC must be at V
38
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
Suspend mode, and requires the bank address.
when device is in autoselect mode.
15 setting, command mode verifies are always asynchronous
read operations.
HH
during the entire operation of this command
A D V A N C E
Am49BDS640AH
I N F O R M A T I O N
21. The fourth cycle programs the addressed locking bit. The fifth and
22. The fourth cycle erases all PPBs. The fifth and sixth cycles are
23. The entire four bus-cycle sequence must be entered for each
24. Before issuing the erase command, all PPBs should be
25. In the fourth cycle, 01h indicates PPB set; 00h indicates PPB not
sixth cycles are used to validate whether the bit has been fully
programmed. If DQ0 (in the sixth cycle) reads 0, the program
command must be issued and verified again.
used to validate whether the bits have been fully erased. If DQ0
(in the sixth cycle) reads 1, the erase command must be issued
and verified again.
portion of the password.
programmed in order to prevent over-erasure of PPBs.
set.
December 5, 2003
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