AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 43

• Manufacturer Part Number: AM49BDS640AHD8I
• Description: Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
• Manufacturer: SPANSION [SPANSION]

Note:The system should recheck the toggle bit even if DQ5 =
“1” because the toggle bit may stop toggling as DQ5 changes
to “1.” See the subsections on DQ6 and DQ2 for more
information.
December 5, 2003
No
Figure 7. Toggle Bit Algorithm
Read Byte Twice
DQ6 = Toggle?
DQ6 = Toggle?
Adrdess = VA
Address = VA
Address = VA
(DQ7-DQ0)
(DQ7-DQ0)
(DQ7-DQ0)
Read Byte
Read Byte
DQ5 = 1?
START
FAIL
Yes
Yes
Yes
A D V A N C E
No
No
PASS
Am49BDS640AH
I N F O R M A T I O N
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indi-
cates whether a particular sector is actively erasing
(that is, the Embedded Erase algorithm is in progress),
or whether that sector is erase-suspended. Toggle Bit
II is valid after the rising edge of the final WE# pulse in
the command sequence.
DQ2 toggles when the system reads at addresses
within those sectors that have been selected for era-
sure. But DQ2 cannot distinguish whether the sector is
actively erasing or is erase-suspended. DQ6, by com-
parison, indicates whether the device is actively
erasing, or is in Erase Suspend, but cannot distinguish
which sectors are selected for erasure. Thus, both
status bits are required for sector and mode informa-
tion. Refer to
page 42
See the following for additional information:
“Toggle Bit Algorithm,” on page 41, “DQ6: Toggle Bit I”
o n p a g e 4 0 , F i g u r e 3 8 , “ To g g l e B i t T i m i n g s
(During Embedded Algorithm),” on page
Table 16, “DQ6 and DQ2 Indications,” on page
to compare outputs for DQ2 and DQ6.
Table 16, “DQ6 and DQ2 Indications,” on
Figure 7,
67, and
42.
41