AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 58

• Manufacturer Part Number: AM49BDS640AHD8I
• Description: Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
• Manufacturer: SPANSION [SPANSION]

AC CHARACTERISTICS
Note: Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY with valid data.
1) Address 3Eh or offset by a multiple of 64 (40h)
2) Address is 3Fh or offset by a multiple of 64 (40h)
Note: Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY with valid data.
1) Device crosses a page boundary prior to t
2) Device neither crosses a page boundary nor latches a new address prior to t
56
Addresses
Addresses(1)
Addresses(2)
Data(2)
Data(1)
AVD#
CE#
OE#
RDY
Data(1)
Data(2)
CLK
RDY(1)
RDY(2)
(Even)
(Odd)
AVD#
Figure 26. Standard Handshake Burst Suspend at address 3Eh/3Fh (with 1 Access CLK)
OE#
CLK
A(n)
A(3E)
A(3F)
1
1
t
OES
2
2
t
t
ACC
ACC
3
Figure 27. Read Cycle for Continuous Suspend
3
A D V A N C E
4
4
RCC
t
OES
5
t
t
RACC
RACC
5
D(3E)
D(3F)
6
Suspend
Am49BDS640AH
6
7
I N F O R M A T I O N
D(3F)
D(40)
7
Suspend
8
t
OES
t
CKZ
t
t
RACC
RACC
x
9
Resume
t
x+1
OES
t
CKA
D(n)
D(n)
RCC
t
RACC
x
t
x+2
RCC
D(n+1)
???
Resume
x+1
t
OES
x+3
t
CKA
t
t
???
RACC
RACC
D(40)
D(3F)
D(n+2)
x+2
x+4
x+3
D(3F)
D(40)
D(41)
t
x+5
RCC
x+4
D(3F)
December 5, 2003
D(42)
D(41)
x+6
x+5
D(3F)
D(42)
D(43)
x+7
x+6
D(40)
x+8