AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 75

• Manufacturer Part Number: AM49BDS640AHD8I
• Description: Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
• Manufacturer: SPANSION [SPANSION]

AC CHARACTERISTICS
Wait State Decoding Addresses:
A14, A13, A12 = “111” ⇒ Reserved
A14, A13, A12 = “110” ⇒ Reserved
A14, A13, A12 = “101” ⇒ 5 programmed, 7 total
A14, A13, A12 = “100” ⇒ 4 programmed, 6 total
A14, A13, A12 = “011” ⇒ 3 programmed, 5 total
A14, A13, A12 = “010” ⇒ 2 programmed, 4 total
A14, A13, A12 = “001” ⇒ 1 programmed, 3 total
A14, A13, A12 = “000” ⇒ 0 programmed, 2 total
Note: Figure assumes address D0 is not at an address boundary, active clock edge is rising, and wait state is set to “101”.
December 5, 2003
AVD#
Data
OE#
CLK
1
A D V A N C E
Figure 45. Example of Wait States Insertion
0
2
Am49BDS640AH
3
1
I N F O R M A T I O N
4
total number of clock cycles
2
following AVD# falling edge
number of clock cycles
5
programmed
3
following last wait state triggers
Rising edge of next clock cycle
4
6
next burst data
7
5
D0
D1
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