AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 74
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AM49BDS640AHD8I
Manufacturer Part Number
AM49BDS640AHD8I
Description
Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
Manufacturer
SPANSION [SPANSION]
Datasheet
1.AM49BDS640AHD8I.pdf
(84 pages)
- Current page: 74 of 84
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AC CHARACTERISTICS
Notes:
1. RDY active with data (A18 = 0 in the Configuration Register).
2. RDY active one clock cycle before data (A18 = 1 in the Configuration Register).
3. Cxx indicates the clock that triggers Dxx on the outputs; for example, C60 triggers D60. Figure shows the device crossing a
72
Address (hex)
bank in the process of performing an erase or program.
RDY(1)
RDY(2)
AVD#
OE#,
Data
CLK
CE#
(stays high)
(stays low)
3C
C60
D60
00003Fh: (00007Fh, 0000BFh, etc.) Address 000000h is also a boundary crossing.
3D
C61
A D V A N C E
Figure 44. Latency with Boundary Crossing
Address boundary occurs every 64 words, beginning at address
D61
3E
C62
t
RACC
into Program/Erase Bank
D62
Am49BDS640AH
C63
latency
3F
t
I N F O R M A T I O N
RACC
latency
C63
3F
t
RACC
D63
C63
3F
t
RACC
C64
40
Invalid
Read Status
December 5, 2003
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