AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 53
![no-image](/images/no-image-200.jpg)
AM49BDS640AHD8I
Manufacturer Part Number
AM49BDS640AHD8I
Description
Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
Manufacturer
SPANSION [SPANSION]
Datasheet
1.AM49BDS640AHD8I.pdf
(84 pages)
- Current page: 53 of 84
- Download datasheet (2Mb)
AC CHARACTERISTICS
Note: Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY one cycle before valid data.
December 5, 2003
Addresses
AVD#
Data
RDY
CE#
CLK
OE#
t
Hi-Z
t
AVC
ACS
t
CR
t
ACH
Aa
1
t
CES
Figure 17. Linear Burst with RDY Set One Cycle Before Data
t
AVD
2
A D V A N C E
6 wait cycles for initial access shown.
t
IACC
3
t
ACC
t
4
OE
Am49BDS640AH
t
RACC
I N F O R M A T I O N
5
6
t
RDYS
Da
t
BDH
Da+1
t
BACC
Da+2
Da+3
t
t
CEZ
OEZ
Da + n
Hi-Z
Hi-Z
51
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