AM49BDS640AHD8I SPANSION [SPANSION], AM49BDS640AHD8I Datasheet - Page 77

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AM49BDS640AHD8I

Manufacturer Part Number
AM49BDS640AHD8I
Description
Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
Manufacturer
SPANSION [SPANSION]
Datasheet
ERASE AND PROGRAMMING PERFORMANCE
Notes:
1. Typical program and erase times assume the following conditions: 25
2. Under worst case conditions of 90°C, V
3. The typical chip programming time is considerably less than the maximum chip programming time listed.
4. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
6. The device has a minimum erase and program cycle endurance of 1 million cycles.
BGA BALL CAPACITANCE
Notes:
1. Sampled, not 100% tested.
2. Test conditions T
DATA RETENTION
December 5, 2003
Parameter
Sector Erase Time
Chip Erase Time
Word Programming Time
Accelerated Word Programming Time
Chip Programming Time (Note 3)
Accelerated Chip Programming Time
Parameter
Minimum Pattern Data Retention Time
programming typicals assumes a checkerboard pattern.
Table 15, “Command Definitions,” on page 36 for further information on command definitions.
Parameter
Symbol
C
C
C
OUT
IN2
IN
A
= 25°C, f = 1.0 MHz.
32 Kword
4 Kword
Control Pin Capacitance
Parameter Description
Output Capacitance
Input Capacitance
A D V A N C E
CC
Typ (Note 1)
= 1.65 V, 1,000,000 cycles.
75.5
103
0.4
0.2
33
9
4
Am49BDS640AH
I N F O R M A T I O N
Max (Note 2)
226.5
210
120
99
5
5
Test Conditions
°
150°C
125°C
C, 1.8 V V
Test Setup
V
V
V
OUT
IN
IN
= 0
= 0
= 0
CC
Unit
µs
µs
s
s
s
s
, 1 million cycles. Additionally,
Excludes 00h programming
prior to erasure (Note 4)
Excludes system level
overhead (Note 5)
Excludes system level
overhead (Note 5)
Min
10
20
Typ
4.2
5.4
3.9
Comments
Max
5.0
6.5
4.7
Years
Years
Unit
Unit
pF
pF
pF
75

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