OR3T125-5BA352 AGERE [Agere Systems], OR3T125-5BA352 Datasheet - Page 74

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OR3T125-5BA352

Manufacturer Part Number
OR3T125-5BA352
Description
3C and 3T Field-Programmable Gate Arrays
Manufacturer
AGERE [Agere Systems]
Datasheet
ORCA Series 3C and 3T FPGAs
Programmable Clock Manager (PCM)
74
EXPRESSCLK
ROUTING
FROM
PAD
FPGA-PCM INTERFACE
0
1
2
3
CLOCK
INPUT
S0
REGISTER 7
REGISTER 6
REGISTER 5
REGISTER 4
REGISTER 3
REGISTER 2
REGISTER 1
REGISTER 0
PROGRAMMABLE
DIVIDER
DIV0
Figure 46. PCM Functional Block Diagram
0
S4
1
S5
PROGRAMMABLE DELAY
1...7
LOW-PASS FILTER
COMBINATORIAL
CHARGE PUMP
LINES (32 TAPS)
S6
1...7
LOGIC
AND
S7
1...7
(continued)
S8
1...7
0
1
2
3
S4
PROGRAMMABLE
DETECTOR
1
S2
0
PHASE
DIVIDER
DIV2
PROGRAMMABLE
DIVIDER
DIV1
0
Lucent Technologies Inc.
0
1
2
3
0
1
2
3
FEEDBACK
S10
S4
CLOCK
PCM
S3
0
1
2
3
Data Sheet
SYSTEM CLOCK
June 1999
EXPRESSCLK
FEEDBACK
EXPRESSCLK
ROUTING
FROM
OUTPUT
OUTPUT
5-5829(F)

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