TRK-USB-MPC5643L Freescale Semiconductor, TRK-USB-MPC5643L Datasheet - Page 24

• Manufacturer Part Number: TRK-USB-MPC5643L
• Description: Development Boards & Kits - Other Processors StarTrakMiniUSG MPC5643L
• Manufacturer: Freescale Semiconductor

Specifications of TRK-USB-MPC5643L

• Rohs: yes
• Product: Starter Kits
• Tool Is For Evaluation Of: MPC5643L
• Core: Five Stage Pipeline
• Interface Type: LIN, DSPI
• Operating Supply Voltage: 3 V to 3.6 V
• Data Bus Width: 32 bit, 64 bit
• Description/function: Starter Kit for MPC5643L
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• For Use With: MPC5643L

Package pinouts and signal descriptions
Table 3
signals multiplexed to each pin.
24
1
C
D
G
H
M
N
R
U
A
B
E
F
K
L
P
T
J
NC = Not connected (the pin is physically not connected to anything on the device)
and
V
V
V
V
V
V
V
EXTAL
MDO0
G[13]
XTAL
F[10]
_OSC
_OSC
SS_HV
SS_HV
DD_HV
DD_HV
SS_HV
SS_HV
SS_HV
H[1]
H[3]
F[5]
F[7]
F[9]
_IO
_IO
_IO
_IO
_IO
Table 4
1
1
V
V
V
V
V
V
V
RESET
V
FCCU
G[12]
G[15]
F[11]
_F[0]
SS_HV
SS_HV
DD_HV
SS_HV
DD_HV
SS_HV
DD_HV
SS_HV
NC
F[4]
F[6]
F[8]
_IO
_IO
_IO
_IO
_IO
_IO
_IO
_IO
2
2
1
provide the pin function summaries for the 144-pin and 257-pin packages, respectively, listing all the
V
V
V
V
_REG_0
A[15]
DD_HV
SS_HV
DD_HV
SS_HV
B[6]
D[1]
A[7]
C[5]
C[4]
D[9]
D[8]
D[5]
D[6]
NC
NC
_IO
_IO
_IO
3
3
V
V
FCCU_
V
_REG_0
A[14]
SS_LV_
DD_LV_
DD_HV
H[2]
C[6]
NMI
A[8]
A[6]
A[5]
C[7]
D[7]
C[1]
E[4]
F[1]
NC
NC
PLL
PLL
4
4
Figure 3. MPC5643L 257 MAPBGA pinout (top view)
V
V
SS_LV_
DD_LV_
H[0]
D[2]
COR
COR
B[7]
E[5]
C[2]
F[3]
MPC5643L Microcontroller Data Sheet, Rev. 8.1
5
5
V
V
V
V
V
V
V
V
V
G[14]
A[13]
DD_LV_
DD_LV_
DD_LV_
SS_LV_
A[9]
COR
COR
COR
DD_LV
DD_LV
DD_LV
DD_LV
DD_LV
COR
E[6]
E[7]
E[2]
6
6
V
V
V
V
V
V
_REG_2
V
V
V
V
_ADR0
_ADR0
DD_LV_
SS_LV_
DD_HV
DD_HV
SS_HV
D[3]
D[4]
COR
COR
SS_LV
SS_LV
SS_LV
SS_LV
DD_LV
B[8]
B[9]
F[0]
7
7
V
V
V
V
V
_REG_2
V
V
V
V
C[15]
DD_LV_
SS_LV_
B[10]
B[11]
B[12]
DD_HV
DD_HV
D[0]
COR
COR
SS_LV
SS_LV
SS_LV
SS_LV
DD_LV
NC
_IO
8
8
V
V
V
V
V
V
V
V
V
V
V
V
V
V
_ADR1
_ADR1
DD_LV_
SS_LV_
DD_HV
SS_HV
SS_HV
SS_HV
DD_HV
SS_HV
DD_HV
_ADV
COR
COR
SS_LV
SS_LV
SS_LV
SS_LV
DD_LV
I[0]
_IO
_IO
_IO
_IO
9
9
V
JCOMP
V
V
V
V
V
V
V
V
H[12]
A[12]
DD_LV_
SS_LV_
B[13]
DD_HV
SS_HV
_ADV
COR
COR
DD_LV
E[9]
SS_LV
SS_LV
SS_LV
SS_LV
NC
10
_IO
10
V
V
V
V
V
V
V
H[10]
E[15]
H[11]
A[11]
DD_LV_
SS_LV_
B[14]
B[15]
E[10]
E[11]
COR
COR
SS_LV
SS_LV
SS_LV
SS_LV
DD_LV
11
11
V
V
V
V
V
V
V
V
H[14]
E[14]
E[13]
DD_LV_
DD_LV_
DD_LV_
E[12]
COR
COR
DD_LV
DD_LV
DD_LV
DD_LV
DD_LV
COR
C[0]
I[1]
NC
12
12
V
BCTRL
A[10]
F[14]
F[15]
SS_LV_
B[3]
COR
E[0]
NC
13
13
V
V
V
V
V
D[12]
F[13]
C[11]
_PMU
DD_HV
DD_HV
DD_HV
B[2]
B[1]
SS_LV
DD_LV
A[1]
A[0]
NC
NC
NC
NC
NC
14
_IO
_IO
14
Freescale Semiconductor
V
V
V
V
_REG_1
_REG_1
C[10]
_TEST
C[14]
C[13]
H[13]
C[12]
G[10]
D[10]
G[11]
SS_HV
DD_HV
DD_HV
TCK
SS_HV
B[0]
H[8]
B[5]
V
15
_IO
_IO
15
PP
V
V
V
V
V
V
D[14]
D[11]
DD_HV
DD_HV
TMS
DD_HV
SS_HV
A[4]
G[2]
H[9]
_FLA
SS_HV
_FLA
H[7]
H[4]
A[2]
G[8]
SS_HV
I[2]
16
_IO
_IO
_IO
_IO
16
V
V
V
V
H[15]
F[12]
SS_HV
SS_HV
G[3]
G[4]
G[6]
H[6]
A[3]
B[4]
H[5]
G[5]
G[7]
G[9]
SS_HV
SS_HV
I[3]
17
_IO
_IO
_IO
_IO
17