TRK-USB-MPC5643L Freescale Semiconductor, TRK-USB-MPC5643L Datasheet - Page 92

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TRK-USB-MPC5643L

Manufacturer Part Number
TRK-USB-MPC5643L
Description
Development Boards & Kits - Other Processors StarTrakMiniUSG MPC5643L
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of TRK-USB-MPC5643L

Rohs
yes
Product
Starter Kits
Tool Is For Evaluation Of
MPC5643L
Core
Five Stage Pipeline
Interface Type
LIN, DSPI
Operating Supply Voltage
3 V to 3.6 V
Data Bus Width
32 bit, 64 bit
Description/function
Starter Kit for MPC5643L
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
For Use With
MPC5643L
Electrical characteristics
3.13
92
1
2
3
f
f
REF_CRYSTAL
f
FMPLLOUT
C
REF_EXT
f
Considering operation with FMPLL not bypassed.
With FM; the value does not include a possible +2% modulation
“Loss of Reference Frequency” window is the reference frequency range outside of which the FMPLL is in self clocked
mode.
f
t
PLL_IN
f
f
f
f
t
LORH
LOCK
JITTER
FREE
LORL
f
Symbol
t
SCM
MOD
f
CYC
t
f
f
t
LCK
f
t
PKJIT
sys
LTJIT
UL
CS
DS
lpll
dc
FMPLL electrical characteristics
D FMPLL reference frequency
D Phase detector input
D Clock frequency range in
P Free running frequency
D On-chip FMPLL frequency
D System clock period
D Loss of reference frequency
D Self-clocked mode
P Lock time
D FMPLL lock time
D Duty cycle of reference
D Frequency LOCK range
D Frequency un-LOCK range
D Modulation depth
D Modulation frequency
T CLKOUT period jitter
T Single period jitter (peak to
T Long term jitter
range
frequency range (after
pre-divider)
normal mode
window
frequency
peak)
1
3
Parameter
4,5
6, 7
MPC5643L Microcontroller Data Sheet, Rev. 8.1
Table 23. FMPLL electrical characteristics
8,9,10,11
12
2
Crystal reference
Measured using clock division
(typically 16)
Lower limit
Upper limit
Stable oscillator (f
stable V
Long-term jitter (avg. over 2 ms
interval), f
PHI @ 120 MHz,
Input clock @ 4 MHz
PHI @ 100 MHz,
Input clock @ 4 MHz
PHI @ 80 MHz,
Input clock @ 4 MHz
PHI @ 16 MHz,
Input clock @ 4 MHz
Center spread
Down spread
DD
FMPLLOUT
Conditions
PLLIN
maximum
= 4 MHz),
±0.25
–0.5
Min
–18
1.6
20
16
24
20
40
–6
–6
4
4
4
Typ
1 / f
Freescale Semiconductor
120
±2.0
Max
-8.0
150
120
150
200
200
175
185
200
100
3.7
40
16
56
60
±6
18
6
6
sys
2
% f
% f
f
FMPLLOUT
FMPLLOUT
FMPLLOUT
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
kHz
µs
s
ns
ns
ps
ps
ps
ns
%
%

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