PSD835G2-90UI STMicroelectronics, PSD835G2-90UI Datasheet - Page 44

IC FLASH 4MBIT 90NS 80TQFP

PSD835G2-90UI

Manufacturer Part Number
PSD835G2-90UI
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD835G2-90UI

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2016

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0
Erasing Flash memory
9
9.1
9.2
9.3
44/120
Erasing Flash memory
Flash Bulk Erase
The Flash Bulk Erase instruction uses six WRITE operations followed by a READ operation
of the status register, as described in
wrong, the Bulk Erase instruction aborts and the device is reset to the Read Flash memory
status.
During a Bulk Erase, the memory status may be checked by reading the Error flag bit (DQ5),
the Toggle flag bit (DQ6), and the Data Polling flag bit (DQ7), as detailed in
Programming Flash
Erase Failure (maximum number of Erase cycles has been executed).
It is not necessary to program the memory with 00h because the PSD automatically does
this before erasing to 0FFh.
During execution of the Bulk Erase instruction, the Flash memory does not accept any
instructions.
Flash Sector Erase
The Sector Erase instruction uses six WRITE operations, as described in
Flash Sector Erase codes and Flash memory sector addresses can be written subsequently
to erase other Flash memory sectors in parallel, without further coded cycles, if the
additional bytes are transmitted in a shorter time than the time-out period of about 100 µs.
The input of a new Sector Erase code restarts the time-out period.
The status of the internal timer can be monitored through the level of the Erase Time-out
flag bit (DQ3). If the Erase Time-out flag bit (DQ3) is '0,' the Sector Erase instruction has
been received and the time-out period is counting. If the Erase Time-out flag bit (DQ3) is '1,'
the time-out period has expired and the PSD is busy erasing the Flash memory sector(s).
Before and during Erase time-out, any instruction other than Suspend Sector Erase and
Resume Sector Erase instructions abort the cycle that is currently in progress, and reset the
device to READ mode. It is not necessary to program the Flash memory sector with 00h as
the PSD does this automatically before erasing (byte=FFh).
During a Sector Erase, the memory status may be checked by reading the Error flag bit
(DQ5), the Toggle flag bit (DQ6), and the Data Polling flag bit (DQ7), as detailed in
Section 8: Programming Flash
During execution of the Erase cycle, the Flash memory accepts only Reset and Suspend
Sector Erase instructions. Erasure of one Flash memory sector may be suspended, in order
to read data from another Flash memory sector, and then resumed.
Suspend Sector Erase
When a Sector Erase cycle is in progress, the Suspend Sector Erase instruction can be
used to suspend the cycle by writing 0B0h to any even address when an appropriate Sector
Select (FS0-FS7 or CSBOOT0-CSBOOT3) is high (see
from another Flash memory sector after the Erase cycle has been suspended. Suspend
Sector Erase is accepted only during an Erase cycle and defaults to READ mode. A
memory. The Error flag bit (DQ5) returns a ’1’ if there has been an
memory.
Table
7. If any byte of the Bulk Erase instruction is
Table
7). This allows reading of data
Table
Section 8:
7. Additional
PSD835G2

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