PSD835G2-90UI STMicroelectronics, PSD835G2-90UI Datasheet - Page 86
PSD835G2-90UI
Manufacturer Part Number
PSD835G2-90UI
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet
1.PSD835G2-90U.pdf
(120 pages)
Specifications of PSD835G2-90UI
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2016
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD835G2-90UI
Manufacturer:
ST
Quantity:
201
Company:
Part Number:
PSD835G2-90UI
Manufacturer:
STMicroelectronics
Quantity:
10 000
I/O ports
17.24
17.25
86/120
Port F – functionality and structure
Port F can be configured to perform one or more of the following functions:
●
●
●
●
●
●
●
●
Port G – functionality and structure
Port G can be configured to perform one or more of the following functions:
●
●
●
MCU I/O mode
CPLD Output – External Chip Select ECS7-ECS0 can be connected to port F (or port
C).
CPLD Input – as direct input of the CPLD array.
Address In – addition high address inputs. Direct input to the CPLD array, no Input
macrocell (IMC) latching is available.
Latched Address Out – Provide latched address out per
Up Reset, Warm Reset and Power-down
Slew Rate – pins can be set up for fast slew rate.
Data port – connected to D7-D0 when port F is configured as Data port for a non-
multiplexed bus.
Peripheral I/O mode.
MCU I/O mode
Latched Address Out – Provide latched address out per
Open Drain – pins can be configured in Open Drain mode.
mode.
Table 26: Status during Power-
Table
26.
PSD835G2