MPC8313E-RDB Freescale Semiconductor, MPC8313E-RDB Datasheet - Page 35
![BOARD PROCESSOR](/photos/9/23/92379/mfg_mpc8313e-rdb_sml.jpg)
MPC8313E-RDB
Manufacturer Part Number
MPC8313E-RDB
Description
BOARD PROCESSOR
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MCUr
Datasheets
1.MPC8313CZQAFFB.pdf
(100 pages)
2.MPC8313E-RDBB.pdf
(52 pages)
3.MPC8313E-RDBB.pdf
(2 pages)
Specifications of MPC8313E-RDB
Contents
Reference Design Board, Software and Documentation
Termination Type
SMD
Supply Voltage Max
1.05V
Tool / Board Applications
Wired Connectivity-LIN, CAN, Ethernet, USB
Mcu Supported Families
POWERQUICC II PRO
Rohs Compliant
Yes
Filter Terminals
SMD
Silicon Manufacturer
Freescale
Silicon Core Number
MPC83xx
Kit Application Type
Communication & Networking
Application Sub Type
Ethernet
Core Architecture
Power Architecture
Silicon Family Name
PowerQUICC II PRO
For Use With/related Products
MPC8313E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.5.2
Table 39
Freescale Semiconductor
At recommended operating conditions with LV
Supply voltage (3.3 V) NV
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input high current
Input low current
Note:
1. Note that the symbol V
MDC frequency
MDC period
MDC clock pulse width high
MDC to MDIO delay
MDIO to MDC setup time
MDIO to MDC hold time
MDC rise time
MDC fall time
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. This parameter is dependent on the csb_clk speed. (The MIIMCFG[Mgmt Clock Select] field determines the clock frequency
inputs and t
data timing (MD) for the time t
Also, t
(V) relative to the t
convention is used with the appropriate letter: R (rise) or F (fall).
of the Mgmt Clock EC_MDC.)
Parameter
Parameter/Condition
MDDVKH
provides the MII management AC timing specifications.
MII Management AC Electrical Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Table 38. MII Management DC Electrical Characteristics When Powered at 3.3 V
symbolizes management data timing (MD) with respect to the time data input signals (D) reach the valid state
MDC
MPC8313E PowerQUICC
IN
clock reference (K) going to the high (H) state or setup time. For rise and fall times, the latter
Symbol
DDA
, in this case, represents the LV
V
V
V
V
I
I
OH
IH
OL
IL
/NV
IH
IL
Table 39. MII Management AC Timing Specifications
MDC
DDB
from clock reference (K) high (H) until data outputs (D) are invalid (X) or data hold time.
Symbol
t
t
t
DDA
NV
NV
MDKHDX
MDDVKH
MDDXKH
t
t
t
f
t
MDCH
MDCR
MDHF
MDC
MDC
/LV
DDA
DDA
I
OH
I
DDB
OL
or NV
or NV
1
™
= –1.0 mA
= 1.0 mA
is 3.3 V ± 0.3V or 2.5 V ± 5%
II Pro Processor Hardware Specifications, Rev. 3
DDB
DDB
Min
= Max
= Max
32
10
IN
—
—
—
—
5
0
Conditions
symbol referenced in
—
—
—
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
NV
LV
DDA
DDA
V
V
Typ
400
2.5
IN
—
—
—
—
—
—
or NV
or LV
IN
1
= 0.5 V
= 2.1 V
Ethernet: Three-Speed Ethernet, MII Management
DDB
DDB
Table 1
= Min
= Min
Max
170
—
—
—
—
—
10
10
and
MDKHDX
–600
2.97
2.10
Table
Min
V
2.0
—
—
SS
symbolizes management
2.
MHz
Unit
NV
NV
ns
ns
ns
ns
ns
ns
ns
DDB
DDA
Max
3.63
0.50
0.80
40
—
—
or
+ 0.3
+ 0.3
Notes
2
for
Unit
μA
μA
V
V
V
V
V
35