MPC8313E-RDB Freescale Semiconductor, MPC8313E-RDB Datasheet - Page 40
![BOARD PROCESSOR](/photos/9/23/92379/mfg_mpc8313e-rdb_sml.jpg)
MPC8313E-RDB
Manufacturer Part Number
MPC8313E-RDB
Description
BOARD PROCESSOR
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MCUr
Datasheets
1.MPC8313CZQAFFB.pdf
(100 pages)
2.MPC8313E-RDBB.pdf
(52 pages)
3.MPC8313E-RDBB.pdf
(2 pages)
Specifications of MPC8313E-RDB
Contents
Reference Design Board, Software and Documentation
Termination Type
SMD
Supply Voltage Max
1.05V
Tool / Board Applications
Wired Connectivity-LIN, CAN, Ethernet, USB
Mcu Supported Families
POWERQUICC II PRO
Rohs Compliant
Yes
Filter Terminals
SMD
Silicon Manufacturer
Freescale
Silicon Core Number
MPC83xx
Kit Application Type
Communication & Networking
Application Sub Type
Ethernet
Core Architecture
Power Architecture
Silicon Family Name
PowerQUICC II PRO
For Use With/related Products
MPC8313E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High-Speed Serial Interfaces (HSSI)
9.2.3
40
•
•
•
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
With on-chip termination to XCOREV
(high-speed current steering logic) compatible DC coupled.
Many other low voltage differential type outputs like LVDS (low voltage differential signaling) can
be used but may need to be AC coupled due to the limited common mode input range allowed (100
to 400 mV) for DC-coupled connection.
LVPECL outputs can produce a signal with too large of an amplitude and may need to be
DC-biased at the clock driver output first, then followed with series attenuation resistor to reduce
the amplitude, in addition to AC coupling.
Figure 24. Differential Reference Clock Input DC Requirements (External DC-Coupled)
Figure 25. Differential Reference Clock Input DC Requirements (External AC-Coupled)
or AC coupled into the unused phase (SD_REF_CLK) through the same source impedance as
the clock input (SD_REF_CLK) in use.
Interfacing With Other Differential Signaling Levels
SD_REF_CLK
SD_REF_CLK
MPC8313E PowerQUICC
Figure 26. Single-Ended Reference Clock Input DC Requirements
200 mV < Input Amplitude or Differential Peak < 800 mV
200 mV < Input Amplitude or Differential Peak < 800 mV
400 mV < SD_REF_CLK Input Amplitude < 800 mV
™
II Pro Processor Hardware Specifications, Rev. 3
SS
, the differential reference clocks inputs are HCSL
100 mV < V
V
V
min
max
0 V
Freescale Semiconductor
> V
< V
V
cm
cm
max
cm
– 400 mV
+ 400 mV
V
< 800 mV
< 400 mV
min
V
> 0 V
cm