MPC8313E-RDB Freescale Semiconductor, MPC8313E-RDB Datasheet - Page 77
MPC8313E-RDB
Manufacturer Part Number
MPC8313E-RDB
Description
BOARD PROCESSOR
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MCUr
Datasheets
1.MPC8313CZQAFFB.pdf
(100 pages)
2.MPC8313E-RDBB.pdf
(52 pages)
3.MPC8313E-RDBB.pdf
(2 pages)
Specifications of MPC8313E-RDB
Contents
Reference Design Board, Software and Documentation
Termination Type
SMD
Supply Voltage Max
1.05V
Tool / Board Applications
Wired Connectivity-LIN, CAN, Ethernet, USB
Mcu Supported Families
POWERQUICC II PRO
Rohs Compliant
Yes
Filter Terminals
SMD
Silicon Manufacturer
Freescale
Silicon Core Number
MPC83xx
Kit Application Type
Communication & Networking
Application Sub Type
Ethernet
Core Architecture
Power Architecture
Silicon Family Name
PowerQUICC II PRO
For Use With/related Products
MPC8313E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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20 Clocking
Figure 57
1
2
Freescale Semiconductor
USB_CR_CLK_OUT
SYS_CR_CLK_OUT
CFG_CLKIN_DIV
Multiplication factor M = 1, 1.5, 2, 2.5, and 3. Value is decided by RCWLR[COREPLL].
Multiplication factor L = 2, 3, 4, 5, and 6. Value is decided by RCWLR[SPMF].
125-MHz Source
USB_CR_CLK_IN
SYS_CR_CLK_IN
USB_CLK_IN
SYS_CLK_IN
Crystal
Crystal
GTX_CLK125
shows the internal distribution of clocks within the MPC8313E.
MPC8313E PowerQUICC
Converter
Protocol
eTSEC
MPC8313E
USB Mac
USB PHY
mux
/1,/2
PLL
Figure 57. MPC8313E Clock Subsystem
x L
System
PLL
2
e300c3 Core
™
II Pro Processor Hardware Specifications, Rev. 3
Divider (÷2)
PCI Clock
Clock
csb_clk
Unit
csb_clk to Rest
of the Device
x M
ddr_clk
lbc_clk
Core PLL
To Local Bus
1
Controller
To DDR
Memory
Sys Ref
Divider
Divider
Clock
/n
DDR
Clock
1
0
LBC
/2
core_clk
RTC
3
MEMC_MCK
MEMC_MCK
LCLK[0:1]
PCI_SYNC_OUT
PCI_CLK_OUT[0:2]
RTC_CLK (32 kHz)
PCI_CLK/
PCI_SYNC_IN
Local Bus
Memory
Device
DDR
Memory
Device
Clocking
77
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