C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 133
![BOARD PROTOTYPING W/C8051F060](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F060-TB
Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F060-TB
Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F060/1/2/3/4/5/6/7
Figure 13.3. SFR Page Stack
SFRPGCN Bit
Interrupt
Logic
SFRPAGE
CIP-51
SFRNEXT
SFRLAST
Automatic hardware switching of the SFR Page on interrupts may be enabled or disabled as desired using
the SFR Automatic Page Control Enable Bit located in the SFR Page Control Register (SFRPGCN). This
function defaults to ‘enabled’ upon reset. In this way, the autoswitching function will be enabled unless dis-
abled in software.
A summary of the SFR locations (address and SFR page) is provided in Table 13.2. in the form of an SFR
memory map. Each memory location in the map has an SFR page row, denoting the page in which that
SFR resides. Note that certain SFRs are accessible from ALL SFR pages, and are denoted by the “(ALL
PAGES)” designation. For example, the Port I/O registers P0, P1, P2, and P3 all have the “(ALL PAGES)”
designation, indicating these SFRs are accessible from all SFR pages regardless of the SFRPAGE register
value.
Rev. 1.2
133
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