C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 58
![BOARD PROTOTYPING W/C8051F060](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F060-TB
Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F060-TB
Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F060/1/2/3/4/5/6/7
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Bits 7-4: AD0SC3-0: ADC0 SAR Conversion Clock Period Bits.
Bit 3:
Bit 2:
Bit 1:
Bit 0:
AD0SC3
R/W
Bit7
SAR Conversion clock is divided down from the system clock according to the AD0SC bits
(AD0SC3-0). The number of system clocks used for each SAR conversion clock is equal to
AD0SC + 1. (Note: the ADC0 SAR Conversion Clock should be less than or equal to
25 MHz). See Table 5.1 for conversion timing details.
AD0SCAL: System Calibration Enable.
0: Internal ground and reference voltage are used during offset and gain calibration.
1: External voltages can be used during offset and gain calibration.
AD0GCAL: Gain Calibration.
Read:
0: Gain Calibration is completed or not yet started.
1: Gain Calibration is in progress.
Write:
0: No Effect.
1: Initiates a gain calibration if ADC0 is idle.
AD0LCAL: Linearity Calibration
Read
0: Linearity Calibration is completed or not yet started
1: Linearity Calibration is in progress
Write
0: No Effect
1: Initiates a linearity calibration if ADC0 is idle
AD0OCAL: Offset Calibration.
Read:
0: Offset Calibration is completed or not yet started.
1: Offset Calibration is in progress.
Write:
0: No Effect.
1: Initiates an offset calibration if ADC0 is idle.
AD0SC2
R/W
Bit6
Figure 5.7. ADC0CF: ADC0 Configuration Register
AD0SC1
R/W
Bit5
AD0SC0
R/W
Bit4
AD0SCAL AD0GCAL AD0LCAL
Rev. 1.2
R/W
Bit3
R/W
Bit2
R/W
Bit1
SFR Address:
AD0OCAL
SFR Page:
R/W
Bit0
0xBC
0
Reset Value
11110000
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