MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 1208
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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TPU3 ROM Functions
D.20.1.1
This 9-bit, RCPU-written parameter is used to set up the clock polarity for the SIOP data transfer. The valid
values for CHAN_CONTROL for this function are given in
written by the host before issuing the host service request (HSR) to initialize the function.
D.20.1.2
BIT_D is a RCPU-written bit that determines the direction of shift of the SIOP data. If BIT_D is zero, then
SIOP_DATA is right shifted (LSB first). If BIT_D is one then SIOP_DATA is left shifted (MSB first).
D.20.1.3
This RCPU-written parameter defines the baud rate of the SIOP function. The value contained in
HALF_PERIOD is the number of TCR1 counts for a half-SIOP clock period (for example, for a 50 baud
rate, with a TCR1 period of 240 ns, the value [(1/50)/2]/240 ns = 42) should be written to HALF_PERIOD.
The range for HALF_PERIOD is 1 to 0x8000, although the minimum value in practice will be limited by
other system conditions. See the notes in
performance of the SIOP function.
D.20.1.4
The TPU3 uses this parameter to count down the number of bits remaining during a transfer in progress.
During the SIOP initialization state, BIT_COUNT is loaded with the value contained in XFER_SIZE and
then decremented as the data is transferred. When it reaches zero, the transfer is complete and the TPU3
issues an interrupt request to the RCPU.
D.20.1.5
This RCPU-written parameter determines the number of bits that make up a data transfer. During
initialization, XFER_SIZE is copied into BIT_COUNT. XFER_SIZE is shown as a 5-bit parameter to
match the maximum size of 16 bits in SIOP_DATA, although the TPU3 uses the whole word location. For
normal use, XFER_SIZE should be in the 1- to 16-bit range.
D-56
1
Other values of CHAN_CONTROL may result in indeterminate operation.
CHAN_CONTROL
BIT_D
HALF_PERIOD
BIT_COUNT
XFER_SIZE
CHAN_CONTROL
8 7 6 5 4 3 2 1 0
0 1 0 0 0 1 1 0 1
0 1 0 0 0 1 1 1 0
Table D-3. SIOP Function Valid CHAN_Control Options
1
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure D-32. SIOP Parameters
Section D.20.1.6,
CONTROL BITS
Data valid on clock Falling edge.
Data valid on clock Rising edge.
“SIOP_DATA” for information on the use and
Table
Resulting Action
D-3. CHAN_CONTROL must be
See
PRAM Address Offset Map.
Table 19-24
Freescale Semiconductor
for the
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