MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 1413
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Receiver
Receiver Enable (RE) 15-46
Reception of transmitted frames 16-14
Recoverable exception 3-22
Register diagrams
registers
Freescale Semiconductor
active (RAF) 15-49
data register (RDRF) flag 15-57
enable (RE) 15-48
interrupt enable (RIE) 15-48
wakeup (RWU) 15-48
MPWMPERR MPWMSM period register 18-10
BBCMCR BBC module configuration register 4-19
breakpoint address register (BAR) 23-53
breakpoint counter A value and control register
breakpoint counter B value and control register
CALRAM_OTR CALRAM ownership trace
change of lock interrupt register (COLIR) 8-36
CMPA–CMPD 23-41
CMPE–CMPF 23-46
comparator G-H value registers (CMPG–CMPH) 23-47
condition register (CR) 3-16
conversion command word table (CCW) 13-30
count register (CTR) 3-19
CRAM_RBAx CALRAM region base address
CRAMMCR CALRAM module configuration
CRAMOVL CALRAM overlay configuration
DAE/source instruction service register (DSISR) 3-22
data address register (DAR) 3-23
DCCR0-DCCR15 decompressor class configuration
debug enable register (DER) 23-43
decompressor class configuration 4-25
decrementer register (DEC) 6-40
development port data register (DER) 23-53
documenter register (DEC) 3-23
DPTRAM base address register (RAMBAR) 20-4
DPTRAM module configuration register
DPTRAM test register (DPTTCR) 20-4
dual-mapping base register (DMBR) 10-36
dual-mapping option register (DMOR) 10-37
EIBADR external interrupt relocation table base address
exception cause register (ECR) 23-41
18-16
(COUNTA) 23-45
(COUNTB) 23-46
register 22-18
register 22-16
register 22-13
register 22-17
registers A-19
(DPTMCR) 20-3
register 4-25
,
18-17
,
18-18
,
15-57
,
15-59
,
18-19
,
3-25
MPC561/MPC563 Reference Manual, Rev. 1.2
,
,
14-31
18-12
,
external master control register (EMCR) 6-29
floating point (FPRs) 3-12
floating point exception cause register (FPECR) 3-26
floating point status and control register (FPSCR) 3-13
general purpose registers (GPRs) 3-12
general SPRs 3-24
hard reset configuration word register
I-bus support control register (COUNTA) 23-51
I-bus support control register (ICTRL) A-16
implementation specific SPRs 3-25
integer exception register (XER) 3-18
internal memory map register (IMMR) 6-28
interrupt (QADCINT) 13-12
interrupt in-service registers (SISR2 and SISR3) 6-37
IRAMSTBY control register (VSRMCR) 8-37
L2U global region attribute registers (L2U_GRA) 11-16
L2U module configuration register (L2U_MCR) 11-13
L2U region attribute registers (L2U_RAx) 11-15
L2U region base address registers (L2U_RBAx) 11-14
L-bus support control register 1 (LCTRL1) 23-47
L-bus support control register 2 (LCTRL2) 23-48
left justified, unsigned result format (LJURR) 13-33
link register (LR) 3-19
machine state (MSR) 3-20
machine status save/restore register 0 (SRR0) 3-23
machine status save/restore register 1 (SRR1) 3-23
MBISM interrupt registers 17-69
MBISM registers, list of 17-13
MCPSM register organization 17-17
MCPSMSCR MCPSM status/control register 17-18
MDASM status/control register (duplicated)
MDASM status/control register (MDASMSCR) 17-44
MDASMAR MDASM Data A register 17-41
MDASMBR MDASM Data B register 17-42
memory controller base registers (BR0-BR3) 10-32
memory controller option registers (OR0-OR3) 10-34
memory controller status registers (MSTAT) 10-32
MI_GRA global region atribute register 4-23
MI_RA [0:3] region attribute register 4-22
MI_RBA[0:3] region base address register 4-21
MIOS14ER0 interrupt enable register 17-66
MIOS14ER1 interrupt enable register 17-68
MIOS14LVL0 interrupt level register 0 17-69
MIOS14LVL1 interrupt level register 1 17-70
MIOS14MCR module configuration register 17-15
MIOS14RPR0 interrupt request pending register
MIOS14RPR1 interrupt request pending register
(UC3FCFIG) 21-16
14-35
(MDASMSCRD) 17-43
0 17-67
1 17-68
,
14-11
,
17-62
Index-13
,
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