MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 331

• Manufacturer Part Number: MPC564EVB
• Description: KIT EVAL FOR MPC561/562/563/564
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC564EVB

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC56x
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet
• For Use With/related Products: MPC561, 562, 563, 564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8.11
8.11.1
The SPLL has a 32-bit control register, SCCR, which is powered by keep-alive power.
Freescale Semiconductor
VFLASH (5 V)
1
2
3
4
5
VDDA, VRH
IRAMSTBY
VDD, NVVL,
QVDDL
VDDH ≥ QVDDL - 0.5 V
VDDA can lag VDDH, and VDDSYN can lag QVDDL, but both must be at a valid level before resets are negated.
If keep-alive functions are NOT used, then when system power is on: KAPWR = QVDDL ± 0.1 V; KAPWR ≤ 2.7 V
If keep-alive functions ARE used, then KAPWR = QVDDL = NVDDL = 2.6 V ± 0.1 V when system power is on
KAPWR = 2.6 V ± 0.1 V when system power is off. IRAMSTBY should be powered prior to the other supplies. If
IRAMSTBY is powered at the same time as the other supplies, it should be allowed to stabilize before PORESET
is negated. Normal system power is defined as QVDDL = VDD = VDDF = VDDSYN = KAPWR = 2.6 ± 0.1 V and
VDDA = VDDH = VFLASH = 5.0 ± 0.25 V. Flash programming requirements are the same as normal system
power. VFLASH should always be 5.0 ± 0.25 V. Note: Flash is not implemented on the MPC561.
Do not hold the 2.6-V supplies at ground while VDDH/VDDA is ramping to 5 V.
If 5 V is applied before the 2.6-V supply, all 5-V outputs will be in indeterminate states until the 2.6-V supply
reaches a level that allows reset to be distributed throughout the device If 5 V is applied before the 2.6-V supply,
all 5-V outputs will be in indeterminate states until the 2.6-V supply reaches a level that allows reset to be
distributed throughout the device
PORESET
VDDSYN
HRESET
KAPWR
Clocks Unit Programming Model
VDDH
System Clock Control Register (SCCR)
For more detailed information on power sequencing see
“Power-Up/Down
No Battery Connect Battery
Figure 8-15. Standby and KAPWR, Other Power-On/Off
MPC561/MPC563 Reference Manual, Rev. 1.2
Sequencing.”
NOTE
Power On
Operating
Section F.8,
Power Off
Clocks and Power Control
No Battery
8-29